Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):
A. Burg, D. Seethaler, G. Matz:
"VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding";
Vortrag: IEEE International Symposium on Circuits and Systems,
New Orleans (LA);
27.05.2007
- 30.05.2007; in: "Proc. IEEE International Symposium on Circuits and Systems 2007",
(2007),
ISBN: 1-4244-0921-7;
S. 673
- 676.
Kurzfassung englisch:
This paper describes the first VLSI implementation of lattice reduction (LR) aided multi-antenna broadcast precoding with vector perturbation. The considered LR, scheme is based on Brun's algorithm for finding integer relations. We analyze its high-level architectural issues, we devise a corresponding low-complexity implementation, and, finally, we develop a suitable VLSI architecture. The resulting circuit provides reference for the true silicon complexity of LR, for broadcast precoding with vector perturbation.
"Offizielle" elektronische Version der Publikation (entsprechend ihrem Digital Object Identifier - DOI)
http://dx.doi.org/10.1109/ISCAS.2007.377898
Elektronische Version der Publikation:
http://publik.tuwien.ac.at/files/pub-et_13383.pdf