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N. TaheriNejad, T. Delaroche, D. Radakovits, S. Mirabbasi:
"A Semi-Serial Topology for Compact and Fast Imply-Based Memristive Full Adders";
in: "IEEE New Circuits and Systems symposium (NewCAS)", IEEE New Circuits and Systems symposium (NewCAS), Munich, 2019, 4 S.

Memristive systems are among the emerging technologies that hold a great promise. They are compact, CMOS compatible, easy to fabricate and can serve for storage as well as computation purposes. Adders are one of the most basic and critical building blocks of any computing system. One of the main application areas of memristors is in Material Implication (IMPLY) based logic. IMPLY-based adders are implemented either in serial, which has a compact implementation but needs many steps for calculation, or in parallel, which is fast, however, requires a large number of memristors. In this paper we propose an IMPLY-based adder topology and its respective addition algorithm which is 54-to-65% faster than serial adders and requires 46-to-76% less memristors than parallel adders. This topology is a favorable candidate for applications where neither speed, nor cost (i.e., area or number of memristors) could be compromised to gain the required performance.

https://ieeexplore.ieee.org/document/8961312