Publications in Scientific Journals
W. Kreuzer, S. Fröhlich, M. Gotschlich, A. Helm, B. Wess:
"Übersetzung von Datenflußgraphen in optimierte Assemblerprogramme für Signalprozessoren";
E&I Elektrotechnik und Informationstechnik,
115
(1998),
41
- 47.
Talks and Poster Presentations (with Proceedings-Entry)
S. Fröhlich, M. Gotschlich, U. Krebelder, B. Wess:
"Dynamic Trellis diagrams for optimized DSP code generation";
Talk: IEEE Int. Symposium on Circuits and Systems,
Orlando, USA;
05-31-1999
- 06-02-1999; in: "IEEE Int. Symposium on Circuits and Systems (ISCAS'99)",
(1999),
492
- 495.
B. Wess, S. Fröhlich, M. Gotschlich:
"Optimization data ddress computation in DSP programs: Analysis and evaluation";
Talk: Int. Conference on Signal Processing Application & Technology,
Toronto, Canada;
09-13-1998
- 09-16-1998; in: "9th Int. Conference on Signal Processing Application & Technology",
(1998),
575
- 579.
B. Wess, M. Gotschlich:
"Minimization of data address computation overhead in DSP programs";
Talk: IEEE Int. Conference on Acoustics, Speech, and Signal Processing (ICASSP),
Seattle,WA, USA;
05-12-1998
- 05-15-1998; in: "IEEE Int. Conference on Acoustics, Speech, and Signal Processing (ICASSP'98)",
(1998),
3093
- 3096.
B. Wess, M. Gotschlich:
"Optimierungstechniken für Adreßrecheneinheiten in DSPs";
Talk: DSP Deutschland,
München;
09-30-1997
- 10-01-1997; in: "DSP Deutschland",
(1997),
25
- 34.
B. Wess, M. Gotschlich:
"Code optimization techniques for DSPs with dedicated data address generation units";
Talk: Int. Conference on Signal Processing Application & Technology,
San Diego, USA;
09-14-1997
- 09-17-1997; in: "Int. Conference on Signal Processing Application & Technology (ICSPAT'97)",
(1997),
971
- 975.
B. Wess, M. Gotschlich:
"Optimal DSP memory layout generation as a quadratic assignment problem";
Talk: IEEE Int. Symposium on Circuits and Systems,
Honkong;
06-09-1997
- 06-12-1997; in: "IEEE Int.Symp. On Circuits and Systems (ISCAS'97)",
(1997),
1712
- 1715.
B. Wess, M. Gotschlich:
"Constructing memory layouts for address generation units supporting offset 2 access";
Talk: IEEE Int. Conference on Acoustics, Speech, and Signal Processing (ICASSP),
München;
04-21-1997
- 04-24-1997; in: "IEEE Int. Conference on Acoustics, Speech, and Signal Processing (ICASSP'97)",
(1997),
683
- 686.
M. Gotschlich, B. Wess:
"Automatic generation of constrained expression trees for global optimized DSP assembly code";
Talk: Int. Conference on Signal Processing Application & Technology,
Boston, USA;
10-07-1996
- 10-10-1996; in: "Int. Conference on Signal Processing Application & Technology (ICSPAT'96)",
(1996),
732
- 736.
W. Kreuzer, M. Gotschlich, B. Wess:
"REDACO: A retargetable data flow graph compiler for digital signal processors";
Talk: Int. Conference on Signal Processing Application & Technology,
Boston;
10-07-1996
- 10-10-1996; in: "Int. Conference on Signal Processing Application & Technology ICSPAT'96",
(1996),
742
- 746.