Talks and Poster Presentations (with Proceedings-Entry):
A. Kadlec:
"Neutralizing Timing Anomalies in Superscalar Microprocessors";
Poster: Junior Scientist Conference 2008,
Wien;
2008-11-16
- 2008-11-18; in: "Proceedings of the Junior Scientist Conference 2008",
(2008),
ISBN: 978-3-200-01612-5;
119
- 120.
English abstract:
The complex designs of current computer architectures mostly stem from complex optimizations performed at run-time. The interactions of these optimizations lead to timing anomalies. This paper presents a first approach to actually eliminate timing anomalies by transforming the code in a way that avoids the adverse effects of timing anomalies on the processor state. This enables static timing analysis to be extended to more complex types of computer architectures.