Publication list for members of
E191 - Institute of Computer Engineering
E191-02 Embedded Computing Systems
as authors or essentially involved persons
840 records (1994 - 2021)
The complete list of publications of the Faculty of Informatics is available from the publication database beginning with the publication year 2002. The database may but need not necessarily contain publications dated earlier than 2002.
Books and Book Editorships
R. Bloem, S. Jacobs, A. Khalimov, I. Konnov, S. Rubin, H. Veith, J. Widder:
"Decidability of Parameterized Verification";
Morgan & Claypool Publishers,
San Rafael, CA, USA,
2015,
ISBN: 9781627057431;
170 pages.
B. Charron-Bost, S. Dolev, J. Ebergen, U. Schmid:
"Fault-Tolerant Distributed Algorithms on VLSI Chips";
in series "Dagstuhl Seminar Proceedings",
series editor: B. Charron-Bost, S. Dolev, U. Schmid;
issued by: Leibniz Zentrum Informatik;
Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany,
2009,
ISSN: 1862-4405.
M. Khan, M. Shafique, J. Henkel:
"Energy Efficient Embedded Video Processing Systems - A Hardware-Software Collaborative Approach";
Springer International Publishing,
2017,
ISBN: 978-3-319-61455-7;
238 pages.
R. Kuznets, T. Studer:
"Logics of Proofs and Justifications";
College Publications,
London,
2019,
ISBN: 978-1-84890-168-1;
246 pages.
S. Pagani, J. Chen, M. Shafique, J. Henkel:
"Advanced Techniques for Power, Energy, and Thermal Management for Clustered Manycores";
Springer International Publishing,
Switzerland,
2018,
ISBN: 978-3-319-77478-7;
250 pages.
S. Reda, M. Shafique (ed.):
"Approximate Circuits: Methodologies and CAD";
Springer International Publishing,
Switzerland,
2019,
ISBN: 978-3-319-99321-8;
495 pages.
U. Schmid, J. Widder (ed.):
"Proceedings 32nd International Symposium on Distributed Computing";
Dagstuhl Publishing LIPICS,
2018,
ISBN: 978-3-95977-092-7;
736 pages.
A. Steininger:
"A Measuring Methodology for Fault-Injection Experiments in Computing Systems";
Österreichischer Kunst- und Kulturverlag,
Wien,
1994,
ISBN: 3-85437-079-2;
113 pages.
Publications in Scientific Journals
I. H. Abbassi, F. Khalid, O. Hasan, A. M. Kamboh, M. Shafique:
"McSeVIC: A Model Checking Based Framework for Security Vulnerability Analysis of Integrated Circuits";
IEEE Access,
6
(2018),
32240
- 32257.
P. Achararit, M. Hanif, R. Putra, M. Shafique, Y. Hara-Azumi:
"APNAS: Accuracy-and-Performance-Aware Neural Architecture Search for Neural Hardware Accelerators";
IEEE Access,
8
(2020),
165319
- 165334.
H. Ahmad, T. Arif, M. Hanif, R. Hafiz, M. Shafique:
"SuperSlash: A Unified Design Space Exploration and Model Compression Methodology for Design of Deep Learning Accelerators With Reduced Off-Chip Memory Access Volume";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
39
(2020),
11;
4191
- 4204.
O. Akbari, M. Kamal, A. Afzali-Kusha, M. Pedram, M. Shafique:
"Towards Approximate Computing for Coarse-Grained Reconfigurable Architectures";
IEEE Micro,
Early Access
(2018),
1
- 10.
O. Akbari, M. Kamal, A. Afzali-Kusha, M. Pedram, M. Shafique:
"X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
-
(2019),
1
- 14.
D. Albeseder, M Függer, F. Breitenecker, T. Löscher, S. Tauböck:
"Small PC-Network Simulation -- A Comprehensive Performance Case Study";
Simulation News Europe,
44/45
(2005),
26
- 32.
L. Alrahis, S. Patnaik, M. Hanif, H. Saleh, M. Shafique, O. Sinanoglu:
"GNNUnlock+: A Systematic Methodology for Designing Graph Neural Networks-based Oracle-less Unlocking Schemes for Provably Secure Logic Locking";
IEEE Transactions on Emerging Topics in Computing,
9
(2021).
R. Amjad, R. Hafiz, M. Ilyas, M. Younis, M. Shafique:
"m-SAAC: Multi-stage Adaptive Approximation Control to Select Approximate Computing Modes for Vision Applications";
Microelectronics Journal,
91
(2019),
84
- 91.
M. Ansari, M. Salehi, S. Safari, A. Ejlali, M. Shafique:
"Peak-Power-Aware Primary-Backup Technique for Efficient Fault-Tolerance in Multicore Embedded Systems";
IEEE Access,
8
(2020),
142843
- 142857.
E. Armengaud, A. Steininger, M. Horauer:
"Towards a Systematic Test for Embedded Automotive Communication Systems";
IEEE Transactions on Industrial Informatics,
4
(2008),
3;
145
- 208.
M. Ayub, M. Hanif, O. Hasan, M. Shafique:
"PEAL: Probabilistic Error Analysis Methodology for Low-power Approximate Adders";
ACM Journal on Emerging Technologies in Computing Systems,
17
(2020),
1;
1
- 37.
P. Behal, F. Huemer, R. Najvirt, A. Steininger, Z. Tabassam:
"Towards Explaining the Fault Sensitivity of Different QDI Pipeline Styles";
TCVLSI Newsletter (invited),
7
(2021),
4;
1 pages.
M. Biely, P. Robinson, U. Schmid:
"The Generalized Loneliness Detector and Weak System Models for k-Set Agreement";
IEEE Transactions on Parallel and Distributed Systems,
25
(2014),
4;
1078
- 1088.
M. Biely, P. Robinson, U. Schmid, M. Schwarz, K. Winkler:
"Gracefully degrading consensus and k-set agreement in directed dynamic networks";
Theoretical Computer Science,
726
(2018),
41
- 77.
M. Biely, U. Schmid, B. Weiss:
"Synchronous consensus under hybrid process and link failures";
Theoretical Computer Science,
412
(2011),
40;
5602
- 5630.
R. Bloem, S. Jacobs, A. Khalimov, I. Konnov, S. Rubin, H. Veith, J. Widder:
"Decidability of Parameterized Verification";
ACM SIGACT News,
47
(2016),
2;
53
- 64.
S. Bukhari, F. Khalid, O. Hasan, M. Shafique, J. Henkel:
"Towards Model Checking-Driven Fair Comparison of Dynamic Thermal Management Techniques under Multi-Threaded Workloads";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
-
(2019),
1
- 14.
M. Capra, B. Bussolino, A. Marchisio, G. Masera, M. Martina, M. Shafique:
"Hardware and Software Optimizations for Accelerating Deep Neural Networks: Survey of Current Trends, Challenges, and the Road Ahead";
IEEE Access,
8
(2020),
225134
- 225180.
M. Capra, B. Bussolino, A. Marchisio, M. Shafique, G. Masera, M. Martina:
"An Updated Survey of Efficient Hardware Architectures for Accelerating Deep Convolutional Neural Networks";
Future Internet,
12
(2020),
7;
1
- 22.
J. Castro-Godinez, M. Shafique, J. Henkel:
"ECAx: Balancing Error Correction Costs in Approximate Accelerators";
ACM Transactions on Embedded Computing Systems,
18
(2019),
55;
1
- 20.
B. Charron-Bost, M Függer, T. Nowak:
"New transience bounds for max-plus linear systems";
Discrete Applied Mathematics,
219
(2017),
83
- 99.
B. Charron-Bost, M Függer, L. Welch, J. Widder:
"Time Complexity of Link Reversal Routing";
ACM Transactions on Algorithms,
11
(2015),
3;
1
- 39.
B. Charron-Bost, M. Hutle, J. Widder:
"In search of lost time";
Information Processing Letters,
110
(2010),
21;
928
- 933.
K. Chatterjee, A. Pavlogiannis, A. Kößler, U. Schmid:
"Automated Competitive Analysis of Real-time Scheduling with Graph Games";
Real-Time Systems,
54
(2018),
1;
166
- 207.
K. Chen, J. Chen, F. Kriebel, S. Rehman, M. Shafique, J. Henkel:
"Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity";
IEEE Transactions on Computers,
65
(2016),
11;
3441
- 3454.
M. Delvai, U. Eisenmann, W. Elmenreich:
"A Generic Architecture for Integrated Smart Transducers";
Lecture Notes in Computer Science,
2778
(2003),
733
- 744.
D. Dolev, M Függer, C. Lenzen, M. Perner, U. Schmid:
"HEX: Scaling Honeycombs is Easier than Scaling Clock Trees";
Journal of Computer and System Sciences,
82
(2016),
5;
929
- 956.
D. Dolev, M Függer, C. Lenzen, U. Schmid, A. Steininger:
"Fault-tolerant Distributed Systems in Hardware";
Bulletin of the EATCS,
2
(2015),
116;
43 pages.
D. Dolev, M Függer, M. Posch, U. Schmid, A. Steininger, C. Lenzen:
"Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip";
Journal of Computer and System Sciences,
80
(2014),
4;
860
- 900.
D. Dolev, M Függer, U. Schmid, C. Lenzen:
"Fault-tolerant Algorithms for Tick-generation in Asynchronous Logic: Robust Pulse Generation";
Journal of the ACM,
61
(2014),
5;
1
- 74.
W. Dür, M. Függer, A. Steininger:
"Generation of a fault-tolerant clock through redundant crystal oscillators";
Microelectronics Reliability,
120
(2021),
11 pages.
M. Ferringer:
"On Self-Timed Circuits in Real-Time Systems";
International Journal of Reconfigurable Computing,
2011
(2011),
972375.
S. Friedrichs, M Függer, C. Lenzen:
"Metastability-Containing Circuits";
IEEE Transactions on Computers,
67
(2018),
8;
1167
- 1183.
M Függer, A. Kößler, T. Nowak, U. Schmid, M. Zeiner:
"The effect of forgetting on the performance of a synchronizer";
Performance Evaluation,
93
(2015),
1
- 16.
M Függer, R. Najvirt, T. Nowak, U. Schmid:
"A Faithful Binary Circuit Model";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
39
(2020),
10;
2784
- 2797.
M Függer, T. Nowak, U. Schmid:
"Unfaithful Glitch Propagation in Existing Binary Circuit Models";
IEEE Transactions on Computers,
65
(2016),
3;
964
- 978.
M Függer, T. Nowak, K. Winkler:
"On the radius of nonsplit graphs and information dissemination in dynamic networks";
Discrete Applied Mathematics,
282
(2020),
257
- 264.
M Függer, U. Schmid:
"Reconciling fault-tolerant distributed computing and systems-on-chip";
Distributed Computing,
24
(2012),
6;
323
- 355.
M Függer, A. Steininger, E. Armengaud:
"Safely Stimulating the Clock Synchronization Algorithm in Time-Triggered Systems - A Combined Formal and Experimental Approach";
IEEE Transactions on Industrial Informatics,
5
(2009),
2;
132
- 145.
G. A. Gillani, M. Hanif, M. Krone, S. H. Gerez, M. Shafique, A. B. J. Kokkeler:
"SquASH: Approximate Square-Accumulate with Self-Healing";
IEEE Access,
6
(2018),
49112
- 49128.
G. A. Gillani, M. Hanif, B. Verstoep, S. H. Gerez, M. Shafique, A. B. J. Kokkeler:
"MACISH: Designing Approximate MAC Accelerators With Internal-Self-Healing";
IEEE Access,
7
(2019),
77142
- 77160.
M. Gyimesi, A. Dielacher, T. Handl, C. Wittmann:
"An Object-oriented Solution to ARGESIM Benchmark C4 `Dining Philosophers Problem´ implemented with AnyLogic";
Simulation News Europe SNE,
18
(2008),
1;
31
- 32.
M. Hanif, A. Manglik, M. Shafique:
"Resistive Crossbar-Aware Neural Network Design and Optimization";
IEEE Access,
8
(2020),
229066
- 229085.
M. Hanif, A. Marchisio, T. Arif, R. Hafiz, S. Rehman, M. Shafique:
"X-DNNs: Systematic Cross-Layer Approximations for Energy-Efficient Deep Neural Networks";
ASP Journal of Low Power Electronics (JOLPE),
14
(2018),
4;
520
- 534.
M. Hanif, M. Shafique:
"SalvageDNN: Salvaging Deep Neural Network Accelerators with Permanent Faults through Saliency-driven Fault-aware Mapping";
Philosophical Transactions of The Royal Society A,
378
(2019),
2164;
1
- 23.
A. Hassan, F. Khalid, H. Tariq, M. Hanif, R. Ahmed, S. Rehman:
"SSCNets: Robustifying DNNs using Secure Selective Convolutional Filters.";
Ieee Design & Test,
37
(2020),
1
- 8.
M. Hofbauer, K. Schweiger, H. Dietrich, H. Zimmermann, K.O. Voss, B Merk, U. Schmid, A. Steininger:
"Pulse Shape Measurements by On-chip Sense Amplifiers of Single Event Transients Propagating Through a 90 nm Bulk CMOS Inverter Chain";
IEEE Transactions on Nuclear Science,
vol 59
(2012),
2778
- 2784.
M. Hofbauer, K. Schweiger, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger:
"Supply Voltage Dependent On-Chip Single-Event Transient Pulse Shape Measurements in 90-nm Bulk CMOS Under Alpha Irradiation";
IEEE Transactions on Nuclear Science,
60
(2013),
4;
2640
- 2646.
F. Huemer, A. Steininger:
"Novel Approaches for Efficient Delay-Insensitive Communication";
Journal of Low Power Electronics and Applications,
9
(2019),
16;
41 pages.
M. Hutle, D. Malkhi, U. Schmid, L. Zhou:
"Chasing the Weakest System Model for Implementing Omega and Consensus";
IEEE Transactions on Dependable and Secure Computing,
6
(2009),
4;
269
- 279.
S. Iqbal, S. Sardar, F. Khalid, O. Hasan:
"Statistical Model Checking of Relief Supply Location and Distribution in Natural Disaster Management";
International Journal of Disaster Risk Reduction,
31
(2018),
October 2018;
1043
- 1053.
A. Kanduri, M.-H. Haghbayan, A. Rahmani, M. Shafique, A. Jantsch, P. Liljeberg:
"adBoost: Thermal Aware Performance Boosting Through Dark Silicon Patterning";
IEEE Transactions on Computers,
67
(2018),
8;
1062
- 1077.
F. Khalid, S. R. Hasan, O. Hasan, F. Awwad:
"Runtime Hardware Trojan Monitors Through Modeling Burst Mode Communication Using Formal Verification";
Integration the VLSI journal,
61
(2018),
C;
62
- 76.
F. Khalid, S. R. Hasan, O. Hasan, M. Shafique:
"SIMCom: Statistical Sniffing of Inter-Module Communications for Runtime Hardware Trojan Detection";
Microprocessors and Microsystems,
77
(2020),
1
- 17.
F. Khalid, S. R. Hasan, S. Zia, O. Hasan, F. Awwad, M. Shafique:
"MacLeR: Machine Learning-Based Runtime Hardware Trojan Detection in Resource-Constrained IoT Edge Devices";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
39
(2020),
11;
3748
- 3761.
K. Khdr, S. Pagani, E. Sousa, V. Lari, A. Pathania, F. Hannig, M. Shafique, J. Teich, J. Henkel:
"Power Density-Aware Resource Management for Heterogeneous Tiled Multicores";
IEEE Transactions on Computers,
66
(2017),
3;
488
- 501.
K. Khdr, M. Shafique, S. Pagani, A. Herkersdorf, J. Henkel:
"Combinatorial Auctions for Temperature-Constrained Resource Management in Manycores";
IEEE Transactions on Parallel and Distributed Systems,
31
(2020),
7;
1605
- 1620.
I. Konnov, M. Lazić, H. Veith, J. Widder:
"Para^2: Parameterized Path Reduction, Acceleration, and SMT for Reachability in Threshold-Guarded Distributed Algorithms";
Formal Methods in System Design (invited),
51
(2017),
2;
270
- 307.
I. Konnov, H. Veith, J. Widder:
"On the completeness of bounded model checking for threshold-based distributed algorithms: Reachability";
Information and Computation,
252
(2017),
95
- 109.
H. Kopetz, R. Obermaisser, U. Schmid:
"Dependable Embedded Systems Research at TU Vienna";
Elektrotechnik und Informationstechnik (e&i) (invited),
1
(2005),
1;
33
- 37.
R. Kuznets, B. Lellmann:
"Interpolation for intermediate logics via injective nested sequents";
Journal of Logic and Computation,
31
(2021),
3;
797
- 831.
R. Kuznets, L. Strassburger:
"Maehara-style Modal Nested Calculi";
Archive for Mathematical Logic,
58
(2019),
3-4;
359
- 385.
H. Lee, M. Shafique, M. Al Faruque:
"Aging-Aware Workload Management on Embedded GPU Under Process Variation";
IEEE Transactions on Computers,
67
(2018),
7;
920
- 933.
V. Legourski, Y. Huang, O. Cevan, F. Breitenecker:
"Statechart Modelling for ARGESIM Benchmark C10 `Dining Philosophers Problem II´ using Simulink/Stateflow";
Simulation News Europe SNE,
18
(2008),
1;
39
- 40.
T. Li, M. Shafique, J. Ambrose, J. Henkel, S. Parameswaran:
"Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors";
IEEE Transactions on Computers,
66
(2017),
4;
647
- 660.
J. Maier, C. Hartl-Nesic, A. Steininger:
"Simulation-Based Approaches for Comprehensive Schmitt-Trigger Analyses";
IEEE Transactions on Circuits and Systems-I: Regular Papers,
Dec
(2021),
1
- 14.
A. Marchisio, V. Mrazek, M. Hanif, M. Shafique:
"DESCNet: Developing Efficient Scratchpad Memories for Capsule Network Hardware";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
Early Access
(2020),
1
- 13.
A. Marchisio, V. Mrazek, M. Hanif, M. Shafique:
"FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators";
IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
29
(2021),
4;
716
- 729.
D. Maurer, V. Salapura, M. Gschwind:
"FPGA prototyping of a RISC processor core for embedded applications ";
IEEE Transactions on Computers,
9
(2001),
241
- 250.
S. Mazahir, O. Hasan, R. Hafiz, M. Shafique:
"Probabilistic Error Analysis of Approximate Recursive Multipliers";
IEEE Transactions on Computers,
66
(2017),
11;
1982
- 1990.
S. Mazahir, O. Hasan, R. Hafiz, M. Shafique, J. Henkel:
"Probabilistic Error Modeling for Approximate Adders";
IEEE Transactions on Computers,
66
(2017),
3;
515
- 530.
S. Mazahir, O. Hasan, M. Shafique:
"Adaptive Approximate Computing in Arithmetic Datapaths";
Ieee Design & Test,
35
(2018),
4;
65
- 74.
S. Mazahir, O. Hasan, M. Shafique:
"Self-Compensating Accelerators for Efficient Approximate Computing";
Microelectronics Journal,
88
(2019),
9
- 17.
H. Moser:
"Towards a real-time distribiuted computing model";
Theoretical Computer Science,
410
(2008),
6-7;
631
- 659.
H. Moser, U. Schmid:
"Reconciling fault-tolerant distributed algorithms and real-time computing";
Distributed Computing,
27
(2014),
3;
203
- 230.
T. Nomani, M. Mohsin, Z. Pervaiz, M. Shafique:
"xUAVs: Towards Efficient Approximate Computing for UAVs-Low Power Approximate Adders With Single LUT Delay for FPGA-Based Aerial Imaging Optimization";
IEEE Access,
8
(2020),
102982
- 102996.
T. Nowak, M Függer, A. Kößler:
"On the performance of a retransmission-based synchronizer";
Theoretical Computer Science,
509
(2013),
25
- 39.
T. Odetola, F. Khalid, H. Mohammed, T. Sandefur, S. R. Hasan:
"FeSHI: Feature Map-Based Stealthy Hardware Intrinsic Attack";
IEEE Access,
9
(2021),
115370
- 115387.
D. Öhlinger, J. Maier, M Függer, U. Schmid:
"The Involution Tool for Accurate Digital Timing and Power Analysis";
Integration the VLSI journal,
76
(2021),
87
- 98.
J. Otepka, G. Mandlburger, M. Schütz, N. Pfeifer, M. Wimmer:
"Efficient Loading And Visualization Of Massive Feature-Rich Point Clouds Without Hierarchical Acceleration Structures";
International Archives of the Photogrammetry, Remote Sensing and Spatial Information Sciences (ISPRS Archives),
XLIII-B2-2020
(2020),
293
- 300.
S. Pagani, K. Khdr, J. Chen, M. Shafique, M. Li, J. Henkel:
"Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon";
IEEE Transactions on Computers,
66
(2017),
1;
147
- 162.
S. Pagani, A. Pathania, M. Shafique, J. Chen, J. Henkel:
"Energy Efficiency for Clustered Heterogeneous Multicores";
IEEE Transactions on Parallel and Distributed Systems,
28
(2017),
5;
1315
- 1330.
A. Paltrinieri, R. Peloso, G. Masera, M. Shafique, M. Martina:
"On the Effect of Approximate-Computing in Motion Estimation";
ASP Journal of Low Power Electronics (JOLPE),
15
(2019),
1;
40
- 50.
A. Pathania, V. Venkataramani, M. Shafique, T. Mitra, J. Henkel:
"Defragmentation of Tasks in Many-Core Architecture";
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION,
14
(2017),
1;
2:1
- 2:21.
A. Pathania, V. Venkataramani, M. Shafique, T. Mitra, J. Henkel:
"Optimal Greedy Algorithm for Many-Core Scheduling";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
36
(2017),
6;
1054
- 1058.
A. Pavlogiannis, N. Schaumberger, U. Schmid, K. Chatterjee:
"Precedence-Aware Automated Competitive Analysis of Real-Time Scheduling";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
39
(2020),
11;
3981
- 3992.
T. Polzer, F. Huemer, A. Steininger:
"An Experimental Study of Metastability-Induced Glitching Behavior";
Journal of Circuits, Systems, and Computers,
28
(2019),
Suppl 1;
21 pages.
T. Polzer, F. Huemer, A. Steininger:
"Refined Metastability Characterization Using a Time-to-Digital Converter";
Microelectronics Reliability,
80
(2018),
91
- 99.
T. Polzer, R. Najvirt, F. Beck, A. Steininger:
"On the Appropriate Handling of Metastable Voltages in FPGAs";
Journal of Circuits, Systems, and Computers,
25
(2015),
3;
1640020-1
- 1640020-25.
T. Polzer, A. Steininger:
"A Model for the Metastability Delay of Sequential Elements";
Journal of Circuits, Systems, and Computers,
26
(2017),
8;
174001001
- 174001022.
B. Prabakaran, A. Akhtar, S. Rehman, O. Hasan, M. Shafique:
"BioNetExplorer: Architecture-Space Exploration of Biosignal Processing Deep Neural Networks for Wearables";
IEEE Internet of Things Journal,
8
(2021),
17;
13251
- 13265.
B. Prabakaran, M. Dave, F. Kriebel, S. Rehman, M. Shafique:
"Architectural-Space Exploration of Heterogeneous Reliability and Checkpointing Modes for Out-of-Order Superscalar Processors";
IEEE Access,
7
(2019),
145324
- 145339.
S. Pudukotai Dinakarrao, A. Jantsch, M. Shafique:
"Computer-aided arrhythmia diagnosis with bio-signal processing: A survey of trends and techniques";
Acm Computing Surveys,
52
(2019),
2;
1
- 37.
S. Pudukotai Dinakarrao, A. Jantsch, M. Shafique:
"SmartDPM: Machine Learning-based Dynamic Power Management for Multi-Core Microprocessors";
ASP Journal of Low Power Electronics (JOLPE),
14
(2018),
4;
460
- 474.
S. Pudukotai Dinakarrao, A. Joseph, A. Haridass, M. Shafique, J. Henkel, H. Homayoun:
"Application and Thermal-reliability-aware Reinforcement Learning Based Multi-core Power Management";
ACM Journal on Emerging Technologies in Computing Systems,
15
(2019),
4;
1
- 19.
R. Putra, M. Hanif, M. Shafique:
"ROMANet: Fine-Grained Reuse-Driven Off-Chip Memory Access Management and Data Organization for Deep Neural Network Accelerators";
IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
29
(2021),
4;
702
- 715.
R. Putra, M. Shafique:
"FSpiNN: An Optimization Framework for Memory-Efficient and Energy-Efficient Spiking Neural Networks";
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
39
(2020),
11;
3601
- 3613.
J. Qadir, A. Sathiaseelan, U. Farooq, M. Usama, M. Imran, M. Shafique:
"Approximate Networking for Universal Internet Access";
Future Internet,
9
(2017),
4;
1
- 23.
B. Rahbaran, M Függer, A. Steininger:
"Embedded Real-Time-Tracer -- An Approach with IDE";
Telematik,
3-4
(2004),
16
- 20.
B. Rahbaran, A. Steininger:
"Is Asynchronous Logic More Robust Than Synchronous Logic?";
IEEE Transactions on Dependable and Secure Computing,
6
(2009),
4;
282
- 294.
D. Ratasich, F. Khalid, F. Geissler, R. Grosu, M. Shafique, E. Bartocci:
"A Roadmap Toward the Resilient Internet of Things for Cyber-Physical Systems";
IEEE Access,
7
(2019),
1;
24 pages.
V. Rathore, V. Chaturvedi, A. K. Singh, T. Srikanthan, M. Shafique:
"Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors";
IEEE Transactions on Computers,
Early Access
(2020),
1
- 14.
T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski:
"Runtime verification of microcontroller binary code";
Science of Computer Programming,
80
(2014),
109
- 129.
T. Reinbacher, M Függer, J. Brauer:
"Runtime verification of embedded real-time systems";
Formal Methods in System Design,
Nov 2013
(2013),
10703;
1
- 37.
S. Resch, A. Steininger, C. Scherrer:
"A Composable Real-Time Architecture for Replicated Railway Applications";
Journal of Systems Architecture,
61
(2015),
9;
472
- 485.
M. Riaz, R. Hafiz, S. Khaliq, M. Faisal, H. Iqbal, M. Ali, M. Shafique:
"CAxCNN: Towards the Use of Canonic Sign Digit Based Approximation for Hardware-Friendly Convolutional Neural Networks";
IEEE Access,
8
(2020),
127014
- 127021.
P. Robinson, U. Schmid:
"The Asynchronous Bounded-Cycle Model";
Theoretical Computer Science,
412
(2011),
40;
5580
- 5601.
D. Sabir, M. Hanif, A. Hassan, S. Rehman, M. Shafique:
"TiQSA: Workload Minimization in Convolutional Neural Networks Using Tile Quantization and Symmetry Approximation";
IEEE Access,
Volumen 9
(2021),
53647
- 53668.
D. Sabir, M. Hanif, A. Hassan, S. Rehman, M. Shafique:
"Weight Quantization Retraining for Sparse and Compressed Spatial Domain Correlation Filters";
Electronics,
10(3)
(2021).
M. Salehi, A. Ejlali, M. Shafique:
"Run-Time Adaptive Power-Aware Reliability Management for Manycores";
Ieee Design & Test,
35
(2018),
5;
36
- 44.
F. M. Sampaio, B. Zatt, M. Shafique, J. Henkel, S. Bampi:
"Hybrid Scratchpad Video Memory Architecture for Energy-Efficient Parallel HEVC";
IEEE Transactions on Circuits and Systems for Video Technology,
Early Access
(2018),
1
- 12.
C. Scherrer, A. Steininger:
"Dealing With Dormant Faults in an Embedded Fault-Tolerant Computer System";
IEEE Transactions on Reliability,
52
(2003),
4;
512
- 522.
U. Schmid:
"Design and Implementation of the Bachelor with Honors Program at TU Wien";
Journal of the European Honors Council,
3
(2019),
2;
9 pages.
U. Schmid, K. Schossmaier:
"Interval-based clock synchronization with optimal precision.";
Information and Computation,
186
(2003),
1;
36
- 77.
U. Schmid, A. Steininger, M. Sust:
"FIT-IT Projekt DARTS: Dezentrale fehlertolerante Taktgenerierung";
Elektrotechnik und Informationstechnik (e&i),
Heft 1-2
(2007),
3
- 8.
U. Schmid, B. Weiss, I. Keidar:
"Impossibility Results and Lower Bounds For Consensus Under Link Failures";
SIAM JOURNAL ON COMPUTING,
38
(2009),
5;
1912
- 1951.
M. Shafique, S. Garg:
"Computing in the Dark Silicon Era: Current Trends and Research Challenges";
Ieee Design & Test,
34
(2017),
2;
8
- 23.
M. Shafique, A. Ivanov, B. Vogel, J. Henkel:
"Scalable Power Management for On-Chip Systems with Malleable Applications";
IEEE Transactions on Computers,
65
(2016),
11;
3398
- 3412.
M. Shafique, M. Naseer, T. Theocharides, C. Kyrkou, O. Mutlu, L. Orosa, J. Choi:
"Robust Machine Learning Systems: Challenges,Current Trends, Perspectives, and the Road Ahead";
Ieee Design & Test,
37
(2020),
2;
30
- 57.
M. Shafique, S. Rehman, F. Kriebel, M. Khan, B. Zatt, A. Subramaniyan, B. Vizzotto, J. Henkel:
"Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding";
IEEE Transactions on Computers,
66
(2017),
4;
560
- 574.
M. Shafique, M. Usman Karim Khan, J. Henkel:
"Content-Aware Low-Power Configurable Aging Mitigation for SRAM Memories";
IEEE Transactions on Computers,
65
(2016),
12;
3617
- 3630.
N. Shrivastava, M. Hanif, S. Mittal, S. Sarangi, M. Shafique:
"A survey of hardware architectures for generative adversarial networks";
Journal of Systems Architecture,
Volume 118
(2021).
A. Steininger:
"Testing and Built-in-Self-Test - A Survey";
Journal of Systems Architecture,
46
(2000),
721
- 747.
A. Steininger, G. Fuchs:
"VLSI Implementation of a Distributed Algorithm for Fault-Tolerant Clock Generation";
Journal of Electrical and Computer Engineering,
Clock/Frequency Generation Circuits and Systems
(2011),
936712;
23.
A. Steininger, C. Scherrer:
"Identifying Efficient Combinations of Error Detection Mechanisms Based on Results of Fault-Injection Experiments";
IEEE Transactions on Computers,
51
(2002),
2;
235
- 239.
A. Steininger, C. Scherrer:
"Vom Lenkrad zum Joystick";
Elektrotechnik und Informationstechnik (e&i),
11
(2000),
714
- 720.
A. Steininger, P Tummeltshammer:
"Replicated processors on a single die - How independently do they fail?";
Journal e&i: Elektrotechnik und Informationstechnik,
128
(2011),
245
- 250.
A. Steininger, H. Zimmermann, A. Jantsch, M. Hofbauer, U. Schmid, K. Schweiger, V. S. Veeravalli:
"Building reliable systems-on-chip in nanoscale technologies";
E&I Elektrotechnik und Informationstechnik,
132
(2015),
6;
301
- 306.
S. Tauböck, P. Jahn, T. Polzer, A. Schuster:
"An Object-oriented DEV Approach to ARGESIM Benchmark C16 `Restaurant Business Dynamics´ using Enterprise Dynamics";
Simulation News Europe SNE,
18
(2008),
1;
41
- 42.
K. Thaller, A. Steininger:
"A Transparent Online Memory Test for Simultaneous Detection of Functional Faults and Soft Errors in Memories";
IEEE Transactions on Reliability,
52
(2003),
4;
413
- 422.
B. Thallner, H. Moser, U. Schmid:
"Topology Control for Fault-Tolerant Communication in Wireless Ad Hoc Networks";
Wireless Networks,
16
(2010),
21;
388
- 404.
V. S. Veeravalli, T. Polzer, U. Schmid, A. Steininger, M. Hofbauer, K. Schweiger, H. Dietrich, K. Schneider-Hornstein, H. Zimmermann, K. Voss, B. Merk, M. Hajek:
"An infrastructure for accurate characterization of single-event transients in digital circuits";
Microprocessors and Microsystems,
37
(2013),
772
- 791.
V. S. Veeravalli, A. Steininger, U. Schmid:
"A versatile architecture for long-term monitoring of single-event transient durations";
Microprocessors and Microsystems,
53
(2017),
C;
130
- 144.
J. Widder, M. Biely:
"Optimal Message-Driven Implementations of Omega with Mute Processes";
ACM Transactions on Autonomous and Adaptive Systems.,
4
(2009),
1;
?.
J. Widder, M. Biely, G. Gridling, B. Weiss, J. Blanquart:
"Consensus in the presence of mortal Byzantine faulty processes";
Distributed Computing,
24
(2012),
6;
299
- 321.
J. Widder, U. Schmid:
"The Theta-Model: achieving synchrony without clocks";
Distributed Computing,
22
(2009),
1;
29
- 47.
K. Winkler, U. Schmid:
"An Overview of Recent Results for Consensus in Directed Dynamic Networks";
Bulletin of the EATCS,
128
(2019),
30 pages.
K. Winkler, M. Schwarz, U. Schmid:
"Consensus in rooted dynamic networks with short-lived stability";
Distributed Computing,
32
(2019),
5;
443
- 458.
Z. Yahya, M. Hassan, S. Younis, M. Shafique:
"Probabilistic Analysis of Targeted Attacks Using Transform-Domain Adversarial Examples";
IEEE Access,
8
(2020),
33855
- 33869.
M. Zeiner:
"On a family of $q$-binomial distributions";
Mathematica Slovaca,
64
(2014),
2;
479
- 510.
M. Zeiner, U. Schmid:
"Upper and Lower Bounds for the Synchronizer Performance in Systems with Probabilistic Message Loss";
Methodology and Computing in Applied Probability,
23
(2020),
3;
1023
- 1056.
M. Zeiner, U. Schmid, K. Chatterjee:
"Optimal strategies for selecting coordinators";
Discrete Applied Mathematics,
289
(2021),
392
- 415.
M. Zeiner, M. Schwarz, U. Schmid:
"On Linear-Time Data Dissemination in Dynamic Rooted Trees";
Discrete Applied Mathematics,
255
(2019),
307
- 319.
Editorials in Scientific Journals
M. Krstic, I. Jones, A. Steininger, M Függer:
"Special Issue "Selected Papers from the 24th IEEE International Symposium on Asynchronous Circuits and Systems - ASYNC 2018"";
Journal of Low Power Electronics and Applications,
9
(2019),
2;
2 pages.
M. Shafique, S. Garg, V. Chandra:
"Guest Editors´ Introduction: Computing in the Dark Silicon Era";
Ieee Design & Test,
34
(2017),
2;
3 pages.
A. Steininger, A. Pawlak, V. Stopjakova:
"Novel Trends in Design & Test";
Journal of Circuits, Systems, and Computers,
26
(2017),
80 pages.
T. Theocharides, M. Shafique, J. Choi, O. Mutlu:
"Guest Editors´ Introduction: Robust Resource-Constrained Machine Learning";
Ieee Design & Test,
37
(2020),
2;
5
- 7.
D. Zhu, M. Shafique, M. Lin, S. Pasricha:
"Guest Editorial: Special Issue on Low-Power Dependable Computing";
IEEE Transactions on Sustainable Computing,
3
(2018),
3;
137
- 138.
Contributions to Books
H. Bokhari, M. Shafique, J. Henkel, S. Parameswaran:
"Adroit Use of Dark Silicon for Power, Performance and Reliability Optimisation of NoCs";
in: "The Dark Side of Silicon - Energy Efficient Computing in the Dark Silicon Era",
Springer International Publishing,
Switzerland,
2017,
ISBN: 978-3-319-31596-6,
291
- 325.
A. Gmeiner, I. Konnov, U. Schmid, H. Veith, J. Widder:
"Tutorial on Parameterized Model Checking of Fault-Tolerant Distributed Algorithms";
in: "Formal Methods for Executable Software Models",
Springer,
2014, (invited),
ISBN: 978-3-319-07316-3,
122
- 171.
M. Hanif, R. Hafiz, M. Javed, S. Rehman, M. Shafique:
"Energy-Efficient Design of Advanced Machine Learning Hardware";
in: "Machine Learning in VLSI Computer-Aided Design",
Springer International Publishing,
Switzerland,
2019,
647
- 678.
M. Hanif, R. Hafiz, M. Shafique:
"Configurable Models and Design Space Exploration for Low-Latency Approximate Adders";
in: "Approximate Circuits: Methodologies and CAD",
Springer International Publishing,
Switzerland,
2019,
ISBN: 978-3-319-99321-8,
3
- 23.
M. Hanif, M. Javed, R. Hafiz, S. Rehman, M. Shafique:
"Hardware-Software Approximations for Deep Neural Networks";
in: "Approximate Circuits: Methodologies and CAD",
Springer International Publishing,
Switzerland,
2019,
ISBN: 978-3-319-99321-8,
269
- 288.
M. Hanif, F. Khalid, R. Putra, M. T. Teimoori, F. Kriebel, J. Zhang, K. Liu, S. Rehman, T. Theocharides, A. Artusi, S. Garg, M. Shafique:
"Robust Computing for Machine Learning-Based Systems";
in: "Dependable Embedded Systems",
J. Henkel, N. Dutt (ed.);
Springer Nature Switzerland AG,
Switzerland,
2020,
ISBN: 978-3-030-52016-8,
479
- 503.
A. Herkersdorf, M. Engel, M. Glaß, J. Henkel, V. Kleeberger, J. Kühn, P. Marwedel, D. Mueller-Gritschneder, S. Nassif, S. Rehman, W. Rosenstiel, U. Schlichtmann, M. Shafique, J. Teich, N. Wehn, C. Weis:
"RAP Model-Enabling Cross-Layer Analysis and Optimization for System-on-Chip Resilience";
in: "Dependable Embedded Systems",
J. Henkel, N. Dutt (ed.);
Springer Nature Switzerland AG,
Switzerland,
2020,
ISBN: 978-3-030-52016-8,
1
- 27.
K. Khdr, S. Pagani, M. Shafique, J. Henkel:
"Dark Silicon Aware Resource Management for Many-Core Systems";
in: "Dark Silicon and Future On-chip Systems",
110;
issued by: Elsevier;
Elsevier,
United States,
2018,
ISBN: 978-0-12-815358-1,
127
- 170.
F. Kriebel, K. Chen, S. Rehman, J. Henkel, J. Chen, M. Shafique:
"Dependable Software Generation and Execution on Embedded Systems";
in: "Dependable Embedded Systems",
J. Henkel, N. Dutt (ed.);
Springer Nature Switzerland AG,
Switzerland,
2020,
ISBN: 978-3-030-52016-8,
139
- 160.
F. Kriebel, F. Khalid, B. Prabakaran, S. Rehman, M. Shafique:
"Fault-Tolerant Computing with Heterogeneous Hardening Modes";
in: "Dependable Embedded Systems",
J. Henkel, N. Dutt (ed.);
Springer Nature Switzerland AG,
Switzerland,
2020,
ISBN: 978-3-030-52016-8,
161
- 180.
R. Kuznets:
"Through an Inference Rule, Darkly";
in: "Mathesis Universalis, Computability and Proof",
S. Centrone, S. Negri, D. Sarikaya, P. Schuster (ed.);
Springer International Publishing,
Cham,
2019,
ISBN: 978-3-030-20446-4,
131
- 158.
T. Losert, W. Huber, K. Hendling, M. Jandl:
"A CORBA-Based Architecture for Hard Real-Time Systems";
in: "Intelligent Systems at the Service of Mankind - Volume II",
Ubooks,
Augsburg,
2006,
ISBN: 3866080522,
239
- 254.
S. Mazahir, M. Ayub, O. Hasan, M. Shafique:
"Probabilistic Error Analysis of Approximate Adders and Multipliers";
in: "Approximate Circuits: Methodologies and CAD",
Springer International Publishing,
Switzerland,
2019,
ISBN: 978-3-319-99321-8,
99
- 120.
S. Pagani, K. Khdr, J. Chen, M. Shafique, M. Li, J. Henkel:
"Thermal Safe Power : Efficient Thermal-Aware Power Budgeting for Manycore Systems in Dark Silicon";
in: "The Dark Side of Silicon - Energy Efficient Computing in the Dark Silicon Era",
Springer International Publishing,
Switzerland,
2017,
ISBN: 978-3-319-31596-6,
125
- 158.
S. Pagani, M. Shafique, J. Henkel:
"Design Space Exploration and Run-Time Adaptation for Multicore Resource Management Under Performance and Power Constraints";
in: "Handbook of Hardware/Software Codesign",
Springer Science+Business Media,
Dordrecht,
2017,
ISBN: 978-94-017-7267-9,
301
- 332.
B. Prabakaran, W. El-Harouni, S. Rehman, M. Shafique:
"Approximate Multi-Accelerator Tiled Architecture for Energy-Efficient Motion Estimation";
in: "Approximate Circuits: Methodologies and CAD",
Springer International Publishing,
Switzerland,
2019,
ISBN: 978-3-319-99321-8,
249
- 268.
S. Rehman, B. Prabakaran, W. El-Harouni, M. Shafique, J. Henkel:
"Heterogeneous Approximate Multipliers: Architectures and Design Methodologies";
in: "Approximate Circuits: Methodologies and CAD",
Springer International Publishing,
Switzerland,
2019,
ISBN: 978-3-319-99321-8,
45
- 66.
M. Salehi, F. Kriebel, S. Rehman, M. Shafique:
"Power-Aware Fault-Tolerance for Embedded Systems";
in: "Dependable Embedded Systems",
J. Henkel, N. Dutt (ed.);
Springer Nature Switzerland AG,
Switzerland,
2020,
ISBN: 978-3-030-52016-8,
565
- 588.
M. Shafique, O. Hasan, R. Hafiz, S. Mazahir, M. Hanif, S. Rehman:
"Approximate Computing across the Hardware and Software Stacks";
in: "Many-Core Computing: Hardware and Software",
IET,
2019,
ISBN: 978-1-785-61583-2,
497
- 522.
A. Steininger:
"Fifty Shades of Synchrony";
in: "This Asynchronous Woirld",
A. Mokhov (ed.);
Newcastle University,
Newcastle upon Tyne,
2016, (invited),
ISBN: 978-0-7017-0257-1,
294
- 300.
P Tummeltshammer, J.C Hoe, M. Pueschel:
"Time-Multiplexed Multiple Constant Multiplication";
in: "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems",
IEEE,
2007,
1551
- 1563.
J. Widder, U. Schmid:
"Booting Clock Synchronization in Partially Synchronous Systems with Hybrid Process and Link Failures";
in: "Distributed Computing",
Springer-Verlag,
2007,
115
- 140.
Contributions to Proceedings
Y. Afek, I. Keidar, B. Patt-Shamir, S. Rajsbaum, U. Schmid, G. Taubenfeld:
"2018 Edsger W. Dijkstra Prize in Distributed Computing";
in: "Proceedings 2018 ACM Symposium on Principles of Distributed Computing (PODC'18)",
ACM Press,
2018,
ISBN: 978-1-4503-5795-1,
1.
K. Ambrosch, C. Helpa, J. Lechner, R. Leidenfrost, T. Panhofer, A. platschek, S. Ramberger, U. Stadler, D. Steiner, H. Trinkl, C. Widtmann, M. Delvai:
"Design Variety in Hardware/Software Codesign - Implementations of an AES Encoder";
in: "Austrochip Mikroelektroniktagung",
Austrochip 2006,
2006,
181
- 188.
E. Armengaud, F Rothensteiner, A. Steininger, R. Pallierer, M. Horauer, M Zauner:
"A Structured Approach for the Systematic Test of Embedded Automotive Communication Systems";
in: "Proceedings International Test Conference 2005",
IEEE Computer Society,
2005,
ISBN: 0-7803-9039-3,
21
- 28.
M. Bader, G. Todoran, F. Beck, B. Binder, K. Buchegger:
"TransportBuddy: Navigation in Human Accessible Spaces";
in: "Proceedings of 7th Transport Research Arena TRA 2018",
Zenodo,
2018,
10 pages.
N. Bertrand, I. Konnov, M. Lazić, J. Widder:
"Verification of Randomized Consensus Algorithms Under Round-Rigid Adversaries";
in: "30th International Conference on Concurrency Theory",
Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, Germany,
2019,
33:1
- 33:15.
C. Fetzer, M. Süßkraut, U. Schmid:
"On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times";
in: "On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times",
IEEE Computer Society,
2005,
271
- 280.
A. Goiser, S. Khattab, G. Fassl, U. Schmid:
"A New Robust Interference Reduction Scheme for Low Complexity Direct-Sequence Spread-Spectrum Receivers: Optimization";
in: "CTRQ-2010",
issued by: IEEE-Explore;
IEEE Computer Society,
2010,
ISBN: 978-0-7695-4070-2,
5 pages.
A. Goiser, S. Khattab, G. Fassl, U. Schmid:
"A New Robust Interference Reduction Scheme for Low Complexity Direct-Sequence Spread-Spectrum Receivers: Performance";
in: "CTRQ-2010",
issued by: IEEE-Explore;
IEEE Conference Proceedings,
2010,
ISBN: 978-0-7695-4070-2,
7 pages.
M. Hofbauer, K. Schweiger, H. Dietrich, H. Zimmermann, U. Schmid, B Merk:
"Single Event Effect Measurements in 90nm CMOS Circuits at the Microbeam Facility for the Project FATAL";
in: "GSI Scientific Report 2011",
GSI Helmholtzzentrum für Schwerionenforschung GmbH,
Darmstadt,
2012,
ISSN: 0174-0814,
424.
F. Huemer, T. Polzer, A. Steininger:
"Using a Duplex Time-to-Digital Converter for Metastability Characterization of an FPGA";
in: "2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)",
issued by: IEEE CS Press;
IEEE Xplore Digital Library,
2018,
ISBN: 978-1-5386-5754-6,
141
- 146.
F. Huemer, A. Steininger:
"Advanced Delay-Insensitive 4-Phase Protocols";
in: "2018 Austrochip Workshop on Microelectronics (Austrochip)",
issued by: IEEE CS Press;
IEEE Xplore Digital Library,
2018,
ISBN: 978-1-5386-8200-5,
50
- 55.
F. Huemer, A. Steininger:
"Partially Systematic Constant-Weight Codes for Delay-Insensitive Communication";
in: "2018 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)",
issued by: IEEE CS Press;
IEEE Xplore Digital Library,
2018,
ISBN: 978-1-5386-5883-3,
17
- 25.
F. Khalid, A. Hassan, M. Hanif, S. Rehman, R. Ahmed, M. Shafique:
"FaDec: A Fast Decision-based Attack for Adversarial Machine Learning";
in: "IEEE International Joint Conference on Neural Networks (IJCNN)",
IJCNN,
2020,
ISBN: 978-1-7281-6926-2,
1
- 8.
R. Pallierer, M. Horauer, M Zauner, A. Steininger, E. Armengaud, F Rothensteiner:
"A Generic Tool for Systematic Tests in Embedded Automotive Communication Systems";
in: "Embedded World 2005",
unbekannt,
2005.
M. Proske, C. Trödhandl:
"Anytime, Everywhere - Approaches to Distance Labs in Embedded Systems Education - Extended Abstract";
in: "Proceedings of ICTTA 2006",
IEEE,
2006,
205
- 206.
M. Schütz, A. Steininger, F. Huemer, J. Lechner:
"State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial Reconfiguration";
in: "2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)",
issued by: IEEE CS Press;
IEEE Xplore Digital Library,
2018,
ISBN: 978-1-5386-8398-9,
6 pages.
I. Stoilkovska, I. Konnov, J. Widder, F. Zuleger:
"Verifying Safety of Synchronous Fault-Tolerant Algorithms by Bounded Model Checking";
in: "International Conference on Tools and Algorithms for the Construction and Analysis of Systems",
Springer,
2019,
357
- 374.
Editorials in Proceedings
E. Brunvand, K. Stevens, M. Moreira, A. Steininger:
"Welcome Message: ASYNC 2020";
in: "Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)",
IEEE Computer Society,
2020, (invited),
ISBN: 978-1-7281-5495-4,
2 pages.
P. Jayanti, N. Lynch, B. Patt-Shamir, U. Schmid:
"2019 Principles of Distributed Computing Doctoral Dissertation Award";
in: "Proceedings of the 2019 ACM Symposium on Principles of Distributed Computing (PODC'19)",
ACM,
2019,
2.
L. Sekanina, M. Shafique, M. Krstic, A. Steininger, G. Stojanovic:
"Foreword";
in: "Proceedings 24th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems",
IEEE,
2021, (invited),
ISBN: 978-1-6654-3595-6,
1 pages.
Talks and Poster Presentations (with Proceedings-Entry)
I. H. Abbassi, F. Khalid, S. Rehman, A. M. Kamboh, A. Jantsch, S. Garg, M. Shafique:
"TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint";
Talk: 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE'19),
Florence, Italy;
2019-03-25
- 2019-03-29; in: "Proceedings of 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE)",
IEEE,
(2019),
ISBN: 978-3-9819263-2-3;
914
- 919.
A. Adeyemo, F. Khalid, T. Odetola, S. R. Hasan:
"Security Analysis of Capsule Network Inference using Horizontal Collaboration";
Talk: 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS),
Virtual Conference;
2021-08-09
- 2021-08-11; in: "Proceedings of the 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)",
(2021),
1074
- 1077.
O. Akbari, M. Kamal, A. Afzali-Kusha, M. Pedram, M. Shafique:
"PX-CGRA: Polymorphic Approximate Coarse-Grained Reconfigurable Architecture";
Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18),
Dresden, Deutschland;
2018-03-19
- 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)",
(2018),
ISBN: 978-3-9819263-1-6;
413
- 418.
D. Albeseder:
"Evaluation of Message Delay Correlation in Distributed Systems";
Talk: 3rd Workshop on Intelligent Solutions in Embedded Systems (WISES'05),
Hamburg, Deutschland;
2005-05-20; in: "Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems",
(2005),
139
- 150.
D. Albeseder, J. Widder:
"Simulating Distributed Real-Time Systems";
Poster: Junior Scientist Conference,
Wien;
2006-04-19
- 2006-04-21; in: "Junior Scientist Conference 2006",
(2006),
83
- 84.
L. Alrahis, S. Patnaik, M. Hanif, M. Shafique, O. Sinanoglu:
"UNTANGLE: Unlocking Routing and Logic Obfuscation Using Graph Neural Networks-based Link Prediction";
Talk: 2021 International Conference On Computer-Aided Design,
Virtual Conference;
2021-11-01
- 2021-11-05; in: "Proceedings of the 2021 International Conference On Computer-Aided Design",
(2021).
L. Alrahis, S. Patnaik, F. Khalid, M. Hanif, H. Saleh, M. Shafique, O. Sinanoglu:
"GNNUnlock: Graph Neural Networks-based Oracle-less Unlocking Scheme for Provably Secure Logic Locking";
Talk: 2021 Design, Automation & Test in Europe,
Online;
2021-02-01
- 2021-02-05; in: "Proceedings of the 2021 Design, Automation & Test in Europe",
(2021),
780
- 785.
K. Ambrosch, M. Humenberger, W. Kubinger, A. Steininger:
"Extending two non-parametric transforms for FPGA based stereo matching using bayer filtered cameras";
Talk: IEEE Conference on Computer Vision and Pattern Recognition, 2008. CVPR '08,
Anchorage, Alaska, USA;
2008-06-23
- 2008-06-28; in: "CVPR Workshops 2008. IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops, 2008.",
(2008),
ISBN: 978-1-4244-2339-2;
1
- 8.
K. Ambrosch, M. Humenberger, W. Kubinger, A. Steininger:
"Hardware Implementation of an SAD based stereo vision algorithm";
Talk: Third IEEE Workshop on Embedded Computer Vision,
Minneapolis;
2007-06-23; in: "Proceedings of Third IEEE Workshop on Embedded Computer Vision",
(2007).
B. Aminof, S. Rubin, I. Stoilkovska, J. Widder, F. Zuleger:
"Parameterized Model Checking of Synchronous Distributed Algorithms by Abstraction";
Talk: Verification, Model Checking, and Abstract Interpretation (VMCAI),
Los Angeles;
2018-01-07
- 2018-01-09; in: "VMCAI",
LNCS/Springer,
10747
(2018),
1
- 24.
E. Anceaume, C. Delporte-Gallet, H. Fauconnier, M. Hurfin, J. Widder:
"Clock Synchronization in the Byzantine-Recovery Failure Model";
Talk: International Conference On Principles Of Distributed Systems (OPODIS),
Guadeloupe;
2007-12-17
- 2007-12-20; in: "International Conference On Principles Of DIstributed System",
(2007),
90
- 104.
M. Andjelkovic, M. Krstic, R. Kraemer, V. S. Veeravalli, A. Steininger:
"A Critical Charge Model for Estimating the SET and SEU Sensitivity: A Muller C-Element Case Study";
Talk: The 26th IEEE Asian Test Symposium (ATS´17),
Taipei, Taiwan;
2017-11-27
- 2017-11-30; in: "Proceedings of the 26th IEEE Asian Test Symposium (ATS´17)",
(2017),
1
- 6.
C. Angerer, O. Cevan, L. Fauster, Y. Huang, B. Huber, V. Legourski, S. Pirker, T. Polzer, D. Reichhard, D. Rigler, A. Schuster, B. Weirich, P Tummeltshammer, M. Delvai:
"Exploring Hardware Software Partitioning on the Example of a Face Recognition System";
Poster: Austrochip,
Graz;
2007-10-11; in: "Austrochip - Workshop on Microelectronics",
(2007),
ISBN: 978-3-902465-87-0;
121
- 127.
L. Anghel, V. S. Veeravalli, D. Alexandrescu, A. Steininger, K. Schneider, E. Costenaro:
"Single Event Effects in Muller C-Elements and Asynchronous Circuits Over a Wide Energy Spectrum";
Talk: 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10),
Stanford University, USA;
2014-04-01
- 2014-04-02; in: "Proceedings 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10)",
(2014),
6 pages.
E. Armengaud:
"Experimental Evaluation of the FlexRay Clock Synchronization Service";
Talk: 20. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen,
Wien;
2008-02-24
- 2008-02-26; in: "20. Workshop für Testmethoden und Zuverlässigkeit von Schaltungen und Systemen",
(2008),
85
- 89.
E. Armengaud:
"ExTraCT: A New Approach for the Transparent Test of Time-Triggered Communication Systems";
Talk: 18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen,
Titisee;
2006-03-12
- 2006-03-14; in: "18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen",
(2006).
E. Armengaud:
"Low Level Bus Traffic Replay for the Test of Time-Triggered Communication Systems";
Poster: 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS06),
Prag;
2006-04-18
- 2006-04-21; in: "9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems",
(2006),
155
- 156.
E. Armengaud, W. Forster:
"A Novel Interconnection Approach for Globally Asynchronous Locally Synchronous Circuits";
Poster: Austrochip,
Graz;
2007-10-11; in: "Austrochip - Workshop on Microelectronics",
(2007),
107
- 113.
E. Armengaud, M Függer, A. Steininger:
"Safe deterministic replay for stimulating the clock synchronization algorithm in time-triggered systems";
Talk: WFCS,
Dresden, Germany;
2008-05-20
- 2008-05-23; in: "IEEE International Workshop on Factory Communication Systems, 2008. WFCS 2008.",
(2008),
ISBN: 978-1-4244-2349-1;
277
- 286.
E. Armengaud, F Rothensteiner, A. Steininger, M. Horauer:
"A Flexible Hardware Architecture for Fast Access on Large Non-Volatile Memories";
Talk: IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems,
Sopron;
2005-04-13
- 2005-04-16; in: "Proceedings of IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS) 2005",
(2005),
113
- 120.
E. Armengaud, A. Steininger:
"A Remote and Transparent Approach for the Test and Diagnosis of Automotive Networks";
Poster: Junior Scientist Conference,
Wien;
2006-04-19
- 2006-04-21; in: "Junior Scientist Conference 2006",
(2006).
E. Armengaud, A. Steininger:
"Automatic Parameter Identification in FlexRay Based Automotive Communication Networks";
Talk: IEEE International Conference on Emerging Technologies and Factory Automation,
Prag;
2006-09-20
- 2006-09-22; in: "11th IEEE International Conference on Emerging Technologies and Factory Automation",
(2006),
897
- 904.
E. Armengaud, A. Steininger:
"Pushing the Limits of Remote Online Diagnosis in FlexRay Networks";
Talk: IEEE International Workshop on Factory Communication Systems,
Torino;
2006-06-27
- 2006-06-30; in: "6th IEEE International Workshop on Factory Communication Systems",
(2006).
E. Armengaud, A. Steininger:
"Remote Measurement of Local Oscillator Drifts in FlexRay Networks";
Talk: DATE 2009 (Design, Automation and Test in Europe),
Nice, France;
2009-04-20
- 2009-04-24; in: "DATE09",
Springer,
(2009),
ISBN: 9783981080155;
1082
- 1087.
E. Armengaud, A. Steininger, A. Hanzlik:
"The Effect of Quartz Drift on Convergence-Average based Clock Synchronization";
Talk: IEEE International Conference on Emerging Technologies and Factory Automation (ETFA),
Patras;
2007-09-25
- 2007-09-28; in: "Proceedings of the 12th IEEE Conference on Emerging Technologies and Factory Automation",
(2007),
1123
- 1130.
E. Armengaud, A. Steininger, M. Horauer:
"A Method for Bit Level Test and Diagnosis of Communication Services";
Talk: IEEE International Workshop on Desgin & Diagnostic of Electronic Circuits and Systems,
Sopron;
2005-04-13
- 2005-04-16; in: "Proceedings of IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS) 2005",
(2005),
69
- 74.
E. Armengaud, A. Steininger, M. Horauer:
"An Efficient Test and Diagnosis Environment for Communication Controllers";
Talk: Austrochip,
Wien;
2005-10-06; in: "Austrochip 2005",
???,
(2005).
E. Armengaud, A. Steininger, M. Horauer:
"Efficient Stimulus Genereation for Remote Testing of Distributed Systems - The Flexray Example";
Talk: ETFA,
Catania, Italy;
2005-09-19
- 2005-09-22; in: "Proceedings of the 10th IEEE Internationla Conference on Emerging Technologies and Factory Automation",
IEEE,
I
(2005),
763
- 770.
E. Armengaud, A. Steininger, M. Horauer, R. Pallierer:
"A Layer Model for the Systematic Test of Time-Triggered Automotive Communication Systems";
Talk: IEEE International Workshop on Factory Communication Systems,
Vienna,Austria;
2004-09-22
- 2004-09-24; in: "IEEE Workshop on Factory Communication Systems (WFCS 04)",
IEEE Catalog Number 04TH8777
(2004),
ISBN: 0-7803-8734-1;
275
- 283.
E. Armengaud, A. Steininger, M. Horauer, R. Pallierer:
"Design Trade-offs for Systematic Tests of Embedded Communication Systems";
Talk: IEEE International Conference on Dependable Systems and Networks,
Florence, Italy;
2004-07-28
- 2004-08-01; in: "International Conference on Dependable Systems and Networks (DSN 2004)",
(2004),
118
- 119.
E. Armengaud, A. Steininger, M. Horauer, R. Pallierer, H. Friedl:
"A Monitoring Concept for an Automotive Distributed Network - The FlexRay Example";
Talk: 7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004),
Stara Lesna, Slovakia;
2004-04-18
- 2004-04-21; in: "Proceedings of the 7th Workshop on Design and Diognostics of Electronic Circuits and Systems",
(2004),
ISBN: 80-969117-9-1;
173
- 178.
M. Ayub, O. Hasan, M. Shafique:
"Statistical Error Analysis for Low Power Approximate Adders";
Talk: 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17),
Austin, Texas, USA;
2017-06-18
- 2017-06-22; in: "Proceedings of the 54th Annual Design Automation Conference (DAC) 2017",
ACM,
(2017),
ISBN: 978-1-4503-4927-7;
75:1
- 75:6.
P. Behal, F. Huemer, R. Najvirt, A. Steininger:
"An Automated Setup for Large-Scale Simulation-Based Fault-Injection Experiments on Asynchronous Digital Circuits";
Talk: 24th Euromicro Conference on Digital System Design,
Palermo, Italy;
2021-09-01
- 2021-09-03; in: "Proceedings of the 24th Euromicro Conference on Digital System Design",
(2021),
1
- 8.
P. Behal, F. Huemer, R. Najvirt, Z. Tabassam, A. Steininger:
"Towards Explaining the Fault Sensitivity of Different QDI Pipeline Styles";
Talk: 27th IEEE International Symposium on Asynchronous Circuits and Systems,
online;
2021-09-07
- 2021-09-10; in: "Proceedings 27th IEEE International Symposium on Asynchronous Circuits and Systems",
(2021),
1
- 8.
M. Biely:
"An optimal Byzantine agreement algorithm with arbitrary node and link failures.";
Talk: IASTED International Conference on Parallel and Distributed Computing Systems,
Marina Del Rey, California, USA;
2003-11-03
- 2003-11-05; in: "Proc. 15th Annual IASTED International Conference on Parallel",
(2003),
146
- 151.
M. Biely, B. Charron-Bost, A. Gaillard, M. Hutle, A. Schiper, J. Widder:
"Tolerating Corrupted Communication";
Talk: ACM Symposium on Principles of Distributed Computing,
Portland;
2007-08-12
- 2007-08-15; in: "26th ACM Symposium on Principles of Distributed Computing (PODC'07)",
(2007),
244
- 253.
M. Biely, M. Hutle:
"Consensus When All Processes May Be Byzantine for Some Time";
Talk: 11th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2009),
Lyon;
2009-11-03
- 2009-11-06; in: "Stabilization, Safety, and Security of Distributed Systems",
Lecture Notes in Conputer Science / Springer Verlag,
5873
(2009),
ISBN: 978-3-642-05117-3;
120
- 132.
M. Biely, M. Hutle, L. Penso, J. Widder:
"Relating Stabilizing Timing Assumptions to Stabilizing Failure Detectors Regarding Solvability and Efficiency";
Talk: Ninth International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2007),
Paris;
2007-11-14
- 2007-11-16; in: "stabilization",
(2007).
M. Biely, G. Le Lann, U. Schmid:
"Proof-Based System Engineering Using a Virtual System Model";
Talk: International Service Availability Symposium,
Berlin, Deutschland;
2005-04-25
- 2005-04-26; in: "Service Availability",
(2005),
164
- 179.
M. Biely, P. Robinson, U. Schmid:
"Agreement in Directed Dynamic Networks";
Talk: 19th International Colloquium on Structural Information and Communication Complexity (SIROCCO'12),
Reykjavik, Iceland;
2012-06-30
- 2012-07-02; in: "Proceedings 19th International Colloquium on Structural Information and Communication Complexity (SIROCCO'12)",
(2012),
73
- 84.
M. Biely, P. Robinson, U. Schmid:
"Brief Announcement: Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems";
Talk: Proceedings of the 30th Annual ACM Symposium on Principles of Distributed Computing (PODC'11),
San Jose;
2011-06-06
- 2011-06-08; in: "PODC'11",
ACM,
(2011),
227
- 228.
M. Biely, P. Robinson, U. Schmid:
"Easy Impossibility Proofs for k-Set Agreement in Message Passing Systems";
Talk: International Conference On Principles Of Distributed Systems (OPODIS),
Toulouse;
2011-12-12
- 2011-12-16; in: "OPODIS'11",
Springer Berlin / Heidelberg,
(2011),
299
- 312.
M. Biely, P. Robinson, U. Schmid:
"Solving k-Set Agreement with Stable Skeleton Graphs";
Talk: International Parallel and Distributed Processing Symposium (IPDPS),
Anachorage, Alaska;
2011-05-16
- 2011-05-20; in: "IPDPS Workshops",
(2011),
ISBN: 978-1-61284-425-1;
1488
- 1495.
M. Biely, P. Robinson, U. Schmid:
"Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement";
Talk: OPODIS 2009 (International Conference On Principles Of Distributed Systems),
Nimes, France;
2009-12-15
- 2009-12-18; in: "LNCS Proceedings",
Springer,
5923/2009
(2009),
ISBN: 9783642108761;
285
- 299.
M. Biely, P. Robinson, U. Schmid, M. Schwarz, K. Winkler:
"Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks";
Talk: The international Conference on NETworked sYStems,
Agadir, Marokko;
2015-05-13
- 2015-05-15; in: "NETYS2015",
Springer LNCS,
9466
(2015),
ISBN: 978-3-319-26849-1.
M. Biely, J. Widder:
"Optimal Message-Driven Implementations of Omega with Mute Processes";
Talk: 8th International Symposium on Stabilization, Safety, and Security of Distributed Systems,
Dallas;
2006-11-17
- 2006-11-19; in: "Stabilization, Safety, and Security of Distributed Systems",
(2006),
110
- 121.
M. Birner, T. Handl:
"ARROW - A Generic Hardware Fault Injection Tool for NoCs";
Talk: DSD 2009 (Euromicro Conference on Digital System Design),
Patras, Greece;
2009-08-27
- 2009-08-29; in: "12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD 2009",
IEEE Computer Society,
(2009),
ISBN: 978-0-7695-3782-5;
465
- 472.
P. Bogdan, P. Pande, H. Amrouch, M. Shafique, J. Henkel:
"Power and Thermal Management in Massive Multicore Chips: Theoretical Foundation meets Architectural Innovation and Resource Allocation";
Keynote Lecture: International Conference on Compilers, Architecture and Synthesis for Embedded Systems [CASES 07],
Pittsburgh, Pennsylvania, USA (invited);
2016-10-01
- 2016-10-07; in: "CASES",
ACM,
(2016),
ISBN: 978-1-4503-4482-1.
A. Bosio, I. O´Connor, M. Traiola, J. Echavarria, J. Teich, M. Hanif, M. Shafique, S. Hamdioui, B. Deveautour, P. Girard, K. Bertels:
"Emerging Computing Devices: Challenges and Opportunities for Test and Reliability";
Talk: 2021 IEEE European Test Symposium (ETS),
Virtual Conference (invited);
2021-05-24
- 2021-05-28; in: "Proceedings of the 2021 IEEE European Test Symposium (ETS)",
(2021).
M. Brandalero, A. C. S. Beck, L. Carro, M. Shafique:
"Approximate On-The-Fly Coarse-Grained Reconfigurable Acceleration for General-Purpose Applications";
Talk: 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC),
San Fransisco, USA;
2018-06-24
- 2018-06-28; in: "2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)",
(2018),
ISSN: 0738-100x;
1
- 6.
M. Brandalero, B. Lignati, A. C. S. Beck, M. Shafique, M. Hübner:
"Proactive Aging Mitigation in CGRAs through Utilization-Aware Allocation";
Talk: 2020 57th ACM/IEEE Design Automation Conference (DAC),
San Fransisco, USA (Virtual);
2020-07-20
- 2020-07-24; in: "Proceedings of 2020 57th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2020),
ISSN: 0738-100x;
1
- 6.
M. Brandalero, M. Shafique, L. Carro, A. C. S. Beck:
"TransRec: Improving Adaptability in Single-ISA Heterogeneous Systems with Transparent and Reconfigurable Acceleration";
Talk: 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE'19),
Florence, Italy;
2019-03-25
- 2019-03-29; in: "Proceedings of 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE)",
IEEE,
(2019),
ISBN: 978-3-9819263-2-3;
582
- 585.
O. Bringmann, W. Ecker, I. Feldner, A. Frischknecht, C. Gerum, T. Hämäläinen, M. Hanif, M. Klaiber, D. Mueller-Gritschneder, S. Prebeck, M. Shafique:
"Automated HW/SW Co-design for Edge AI: State, Challenges and Steps Ahead";
Talk: 2021 International Conference on Hardware/Software Codesign and System Synthesis,
Virtual Conference (invited);
2021-10-10
- 2021-10-15; in: "Proceedings of 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS)",
Association for Computing Machinery, New York, NY, United States,
(2021),
11
- 20.
S. Bukhari, F. Lodhi, O. Hasan, M. Shafique, J. Henkel:
"CAnDy-TM: Comparative Analysis of Dynamic Thermal Management in Many-Cores using Model Checking";
Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17),
Lausanne, Switzerland;
2017-03-27
- 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)",
IEEE,
(2017),
ISSN: 1558-1101;
1289
- 1292.
J. Castro-Godinez, S. Esser, M. Shafique, S. Pagani, J. Henkel:
"Compiler-Driven Error Analysis for Designing Approximate Accelerators";
Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18),
Dresden, Deutschland;
2018-03-19
- 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)",
(2018),
ISBN: 978-3-9819263-1-6;
1027
- 1032.
J. Castro-Godinez, D. Hernandez-Araya, M. Shafique, J. Henkel:
"Approximate Acceleration for CNN-based Applications on IoT Edge Devices";
Talk: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS),
San Jose, Costa Rica;
2020-02-25
- 2020-02-28; in: "Proceedings of 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS)",
IEEE,
(2020),
ISBN: 978-1-7281-3427-7;
1
- 4.
J. Castro-Godinez, M. Shafique, J. Henkel:
"Towards Quality-Driven Approximate Software Generation for Accurate Hardware: Work-in-Progress";
Talk: 2020 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES),
Virtual Conference;
2020-09-20
- 2020-09-25; in: "Proceedings of 2020 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES)",
IEEE,
(2020),
ISBN: 978-1-7281-9192-8;
1
- 3.
B. Charron-Bost, S. Dolev, J. Ebergen, U. Schmid:
"Fault Tolerant Distribiuted Algorithms and VLSI - An Appetizer";
Talk: Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips,
Dagstuhl, Germany (invited);
2009-09-07
- 2009-09-10; in: "Fault-Tolerant Distributed Algorithms on VLSI Chips",
Leibniz Zentrum Informatik,
08371
(2009),
ISSN: 1862-4405;
?.
B. Charron-Bost, M Függer, T. Nowak:
"Fast, Robust, Quantizable Approximate Consensus";
Talk: International Colloquium on Automata, Languages and Programming (ICALP),
Rome, Italy;
2016-07-12
- 2016-07-15; in: "Proceedings 43rd International Colloquium on Automata, Languages, and Programming (ICALP'16)",
Leibniz International Proceedings in Informatics (LIPIcs),
(2016),
ISBN: 978-3-95977-013-2;
1
- 14.
B. Charron-Bost, M Függer, T. Nowak:
"Transience Bounds for Distributed Algorithms";
Talk: 11th International Conference on Formal Modeling and Analysis of Timed Systems (FORMATS 2013),
Buenos Aires, Argentina;
2013-08-29
- 2013-08-31; in: "Formal Modeling and Analysis of Timed Systems",
Lecture Notes in Computer Science,
8053
(2013),
ISBN: 978-3-642-40228-9;
77
- 90.
B. Charron-Bost, M Függer, L. Welch, J. Widder:
"Brief announcement: full reversal routing as a linear dynamical system";
Talk: SPAA '11,
San Jose, California, USA;
2011-06-04
- 2011-06-06; in: "Proceedings of the 23rd ACM symposium on Parallelism in algorithms and architectures",
ACM,
(2011),
ISBN: 978-1-4503-0743-7;
129
- 130.
B. Charron-Bost, M Függer, L. Welch, J. Widder:
"Full Reversal Routing as a Linear Dynamical System";
Talk: Structural Information and Communication Complexity,
Gdansk;
2011-06-26
- 2011-06-29; in: "Structural Information and Communication Complexity",
Springer Berlin / Heidelberg,
(2011),
ISBN: 978-3-642-22211-5;
101
- 112.
B. Charron-Bost, M Függer, L. Welch, J. Widder:
"Partial is Full";
Talk: Structural Information and Communication Complexity,
Gdansk;
2011-06-26
- 2011-06-29; in: "Structural Information and Communication Complexity",
Springer Berlin / Heidelberg,
(2011),
ISBN: 978-3-642-22211-5;
113
- 124.
B. Charron-Bost, A. Gaillard, L. Welch, J. Widder:
"Routing without Ordering";
Talk: SPAA 2009 (Parallelism in Algorithms and Architectures),
Calgary, Alberta, Canada;
2009-08-11
- 2009-08-13; in: "Proceedings of the Twenty-First Annual Symposium on Parallelism in Algorithms and Architectures",
ACM,
(2009),
ISBN: 978-1-60558-606-9;
145
- 153.
B. Charron-Bost, L. Welch, J. Widder:
"Link Reversal: How to Play Better to Work Less";
Talk: ALGOSENSORS 2009 (5th International Workshop on Algorithmic Aspects of Wireless Sensor Networks),
Rhodes, Greece;
2009-07-10
- 2009-07-11; in: "Algorithmic Aspects of Wireless Sensor Networks",
Springer,
5304/2008
(2009),
ISBN: 9783642054334;
88
- 110.
K. Chatterjee, A. Kößler, U. Schmid:
"Automated Analysis of Real-Time Scheduling using Graph Games";
Talk: ACM International Conference on Hybrid Systems: Computation and Control,
Philadelphia, USA;
2013-04-08
- 2013-04-11; in: "Proceedings 16th ACM International Conference on Hybrid Systems: Computation and Control (HSCC'13)",
ACM,
(2013),
163
- 172.
A. Chattopadhyay, A. Prakash, M. Shafique:
"Secure Cyber-Physical Systems: Current Trends, Tools and Open Research Problems";
Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17),
Lausanne, Switzerland;
2017-03-27
- 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)",
IEEE,
(2017),
ISSN: 1558-1101;
1104
- 1109.
H. Chung, P. Robinson, L. Welch:
"Brief Announcement: Regional Consecutive Leader Election in Mobile Ad-Hoc Networks";
Talk: ALGOSENSORS 2010 (6th International Workshop on Algorithmic Aspects of Wireless Sensor Networks),
Bordeaux, France;
2010-07-05; in: "Algorithms for Sensor Systems - LNCS",
Springer,
6451/2010
(2010),
ISBN: 9783642169878;
90
- 91.
H. Chung, P. Robinson, L. Welch:
"Regional Consecutive Leader Election in Mobile Ad-Hoc Networks";
Talk: ACM SIGACT/SIGMOBILE (International Workshop on FOUNDATIONS OF MOBILE COUMPUTING),
Cambridge, Massachusetts, USA;
2010-09-16; in: "Proceedings of the 6th International Workshop on Foundations of Mobile Computing",
ACM,
(2010),
ISBN: 9781450304139;
81
- 90.
G. Cignarale, G. Primiero:
"A Multi-Agent Depth Bounded Boolean Logic";
Talk: CIFMA-2020, Cognition: Interdisciplinary Foundations, Models and Applications,
online, Netherlands;
2020-09-14; in: "CIFMA-2020, Cognition: Interdisciplinary Foundations, Models and Applications",
(2020),
1
- 16.
A. Colucci, D. Juhasz, M. Mosbeck, A. Marchisio, S. Rehman, M. Kreutzer, G. Nadbath, A. Jantsch, M. Shafique:
"MLComp: A Methodology for Machine Learning-based Performance Estimation and Adaptive Selection of Pareto-Optimal Compiler Optimization Sequences";
Talk: 2021 Design, Automation & Test in Europe,
Online;
2021-02-01
- 2021-02-05; in: "Proceedings of the 2021 Design, Automation & Test in Europe",
(2021),
108
- 113.
A. Colucci, A. Marchisio, B. Bussolino, V. Mrazek, M. Martina, G. Masera, M. Shafique:
"A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress";
Talk: 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS),
Virtual Conference;
2020-09-20
- 2020-09-25; in: "Proceedings of 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS)",
IEEE,
(2020),
1
- 3.
M. Delvai, U. Eisenmann, W. Elmenreich:
"Intelligent UART Module for Real-Time Applications";
Talk: Workshop on Intelligent Solutions in Embedded Systems (WISES'03),
Wien;
2003-06-27; in: "Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems",
(2003),
177
- 185.
M. Delvai, U. Eisenmann, W. Huber:
"Modular Construction System for Embedded Real-Time Applications";
Poster: Austrochip,
Wien;
2002-10-04; in: "Austrochip 2002",
(2002),
103
- 109.
M. Delvai, C. El Salloum, A. Steininger:
"A Generic Real-time Debugger Architecture";
Talk: World Multiconference on Systemics, cybernetics and Informatics,
Orlando, Florida;
2003-07-27
- 2003-07-30; in: "The 7th World Multiconference on Systemics, Cybernetics and Informatics",
(2003),
65
- 70.
M. Delvai, G. Fuchs:
"LANCE: A 16 Bit Superscalar Processor";
Talk: Austrochip,
Linz;
2003-10-03; in: "Austrochip 2003",
(2003),
87
- 90.
M. Delvai, G. Fuchs, T. Handl, W. Huber, A. Steininger:
"Design of an Asynchronous Microprocessor with Four-State Logic";
Talk: Austrochip,
Wien;
2005-10-06; in: "Austrochip 2005",
(2005),
105
- 112.
M. Delvai, W. Huber, P. Puschner, A. Steininger:
"Processor Support for Temporal Predictability - The SPEAR Design Example";
Talk: 15th Euromicro Conference on Real-Time Systems,
Porto, Portugal;
2003-07-02
- 2003-07-04; in: "Proceedings of the 15 Euromicro International Conference on Real-Time Systems",
(2003),
169
- 176.
M. Delvai, W. Huber, B. Rahbaran, A. Steininger:
"An FPGA-Based Development Platform for the virtual Real-Time Processor Component SPEAR";
Talk: IEEE Design and Diagnostics of Electronic Circuits and Systems (IEEE DDECS 2002),
Brno, Czech Republic;
2002-04-17
- 2002-04-19; in: "Proceedings of IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop",
(2002),
98
- 105.
M. Delvai, W. Huber, B. Rahbaran, A. Steininger:
"SPEAR-Design-Entscheidungen für den "Scalable Processor for Embeded Application in Real-Time Environment"";
Talk: Austrochip,
wien;
2001-10-12; in: "Die Österreichische Tagnung zum Themenbereich Mikroelektronik",
(2001),
25
- 32.
M. Delvai, M. Jankela, A. Steininger:
"Towards Virtual Prototyping of Embedded Computer Systems";
Poster: The 7th World Multiconference on Systemics, Cybernetics and Informatics,
Orlando, Florida;
2003-07-27
- 2003-07-30; in: "Proceedings, Volume I, Information Systems, Technologies and Applications",
(2003),
70
- 75.
M. Delvai, T. Panhofer:
"SELF-HEALING CIRCUITS FOR SPACE-APPLICATIONS";
Poster: 17th International Conference on Field Programmable Logic and Applications (FPL2007),
Amsterdam;
2007-08-27
- 2007-08-29; in: "Proceedings of 17th INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS",
(2007),
ISBN: 1-4244-1060-6;
505
- 506.
M. Delvai, A. Steininger:
"A Practical Comparison of Logic Design Styles";
Talk: The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications,
Orlando;
2006-07-20
- 2006-07-23; in: "The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications - Volume 3",
(2006),
61
- 66.
M. Delvai, A. Steininger:
"Asynchronous Logic Design - from Concepts to Implementation";
Talk: The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications,
Orlando;
2006-07-20
- 2006-07-23; in: "The 3rd International Conference on Cybernetics and Information Technologies, Systems and Applications - Volume 1",
(2006),
81
- 86.
M. Delvai, A. Steininger:
"Solving the Fundamental Problem of Digital Design -- A Systematic Review of Design Methods";
Poster: 9th Euromicro Conference on Digital System Design,
Dubrovnik;
2006-08-30
- 2006-09-01; in: "9th Euromicro Conference on Digital System Design - Architectures, Methods and Tools",
(2006),
131
- 136.
M. Delvai, A. Steininger:
"Teaching Hardware Software Codesign to Software Engineers";
Talk: 1st International Workshop on Reconfigurable Computing Education,
Karlsruhe;
2006-03-01; in: "International Workshop on Reconfigurable Computing Education",
(2006).
A. Dielacher, M Függer:
"How to Speed-up Fault-tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining";
Talk: PODC 2009 (Principles of Distribiuted Computing),
Alberta, Canada (invited);
2009-08-10
- 2009-08-12; in: "PODC'09",
ACM,
(2009),
ISBN: 9781605583969;
276
- 277.
D. Dolev, M Függer, C. Lenzen, U. Schmid:
"Fault-Tolerant Algorithms for Tick-Generation in Asynchronous Logic: Robust Pulse Generation [Extended Abstract]";
Talk: Stabilization, Safety, and Security of Distributed Systems,
Grenoble, France;
2011-10-10
- 2011-10-12; in: "Stabilization, Safety, and Security of Distributed Systems",
Springer Berlin / Heidelberg,
(2011),
ISBN: 978-3642051173;
163
- 177.
D. Dolev, C. Lenzen, M Függer, U. Schmid, M. Perner:
"HEX: Scaling Honeycombs is Easier than Scaling Clock Trees";
Talk: SPAA '13,
Montreal, Canada;
2013-07-23
- 2013-07-25; in: "Proceedings of the 25th ACM symposium on Parallelism in Algorithms and Architectures",
ACM,
(2013),
ISBN: 978-1-4503-1572-2;
164
- 175.
C. Dragoi, M. Lazić, J. Widder:
"Communication-Closed Layers as Paradigm for Distributed Systems: A Manifesto";
Talk: Sinteza 2018 International Scientific Conference on Information Technology and Data Related Research,
Belgrad, Serbien (invited);
2018-04-20; in: "Sinteza 2018 International Scientific Conference on Information Technology and Data Related Research",
Singidunum University,
15
(2018),
131
- 138.
W. Dür, A. Steininger:
"Merging Redundant Crystal Oscillators into a Fault-Tolerant Clock";
Talk: 23rd IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems,
Novi Sad;
2020-04-22
- 2020-04-24; in: "Proceedings 23rd IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems",
Ieee Cs,
(2020),
1
- 6.
C. El Salloum, A. Steininger, P Tummeltshammer:
"Recovery Mechanisms for Dual Core Architectures";
Talk: IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT ),
Washington DC, USA;
2006-10-04
- 2006-10-06; in: "21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 2006, Proceedings",
(2006),
ISBN: 0-7695-2706-x;
380
- 388.
R. El Shahaby, A. Steininger:
"Analysis of State Corruption caused by Permanent Faults in WCHB-based Quasi Delay-Insensitive Pipelines";
Talk: 24th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems,
Wien;
2021-04-07
- 2021-04-09; in: "Proceedings 24th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems",
Ieee Cs,
(2021),
ISBN: 978-1-6654-3595-6;
1
- 6.
R. El Shahaby, A. Steininger:
"On the Effects of Permanent Faults in QDI Circuits - A Quantitative Perspective";
Talk: IEEE International Conference on Computer Design,
Hartford, Connecticut, USA;
2020-10-18
- 2020-10-21; in: "Proceedings IEEE International Conference on Computer Design",
(2020),
1
- 4.
R. El-Allami, A. Marchisio, M. Shafique, I. Alouani:
"Securing Deep Spiking Neural Networks against Adversarial Attacks through Inherent Structural Parameters";
Talk: 2021 Design, Automation & Test in Europe,
Virtual Conference;
2021-02-01
- 2021-02-05; in: "Proceedings of the 2021 Design, Automation & Test in Europe",
(2021),
774
- 779.
W. El-Harouni, S. Rehman, B. Prabakaran, A. Kumar, R. Hafiz, M. Shafique:
"Embracing Approximate Computing for Energy-Efficient Motion Estimation in High Efficiency Video Coding";
Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17),
Lausanne, Switzerland;
2017-03-27
- 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)",
IEEE,
(2017),
ISSN: 1558-1101;
1384
- 1389.
W. Elmenreich, M. Delvai:
"Time-Triggered Communication with UARTs";
Talk: IEEE International Workshop on Factory Communication Systems,
Västeraas;
2002-08-28
- 2002-08-30; in: "Proceedings of the 4th IEEE International Workshop on Factory Communication Systems",
(2002),
97
- 104.
W. Elmenreich, C. Trödhandl, B. Weiss:
"Embedded Systems Home Experimentation";
Talk: Second IASTED International Conference on Education and Technology,
Calgary;
2006-09-17
- 2006-09-19; in: "Proceedings of the Second International Conference on Education and Technology",
(2006),
11
- 15.
C. Fan, Y. Meng, J. Maier, E. Bartocci, S. Mitra, U. Schmid:
"Verifying nonlinear analog and mixed-signal circuits with inputs";
Talk: Proc. of ADHS 2018: the 6th IFAC Conference on Analysis and Design of Hybrid Systems,
Oxford, UK;
2018-07-11
- 2018-07-13; in: "Proc. of ADHS 2018: the 6th IFAC Conference on Analysis and Design of Hybrid Systems",
IFAC-PapersOnLine,
51 / 16
(2018),
241
- 246.
M. Ferringer:
"Conversion and Interfacing Techniques for Asynchronous Circuits";
Talk: 14th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2011),
Cottbus, Germany;
2011-04-13
- 2011-04-15; in: "Design and Diagnostics of Electronic Circuits & Systems",
(2011),
ISBN: 978-1-4244-9755-3;
11
- 16.
M. Ferringer:
"Conversion of Two- to Four-Phase Delay-Insensitive Asynchronous Circuits";
Talk: EUROCON 2011,
Lisbon;
2011-04-27
- 2011-04-29; in: "EUROCON - International Conference on Computer as a Tool (EUROCON), 2011 IEEE",
(2011),
ISBN: 978-1-4244-7486-8;
1
- 4.
M. Ferringer:
"Coupling Asynchronous Signals into Asynchronous Logic";
Poster: Austrochip,
Graz, Austria;
2009-09-07
- 2009-09-08; in: "Austrochip",
Institut für Elektronik - TU Graz,
(2009),
ISBN: 978-3-9501635-1-3;
97
- 102.
M. Ferringer:
"Investigating Self-Timed Circuits for the Time-Triggered Protocol";
Talk: 5th International Workshop on Reconfigurable Communication Centric System-on-Chips, Workshop Proceedings (ReCoSoC),
Karlsruhe, Germany;
2010-05-17
- 2010-05-19; in: "Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip 2010",
KIT Scientific Publishing - DFG,
(2010),
ISBN: 9783866445154;
101
- 108.
M. Ferringer:
"Investigating the Impact of Process Variations on an Asynchronous Time-Triggered-Protocol Controller";
Talk: Dependable Systems and Networks Workshops (DSN-W), 2011 IEEE/IFIP 41st International Conference on,
Hong-Kong;
2011-06-27
- 2011-06-30; in: "Dependable Systems and Networks Workshops",
(2011),
ISBN: 978-1-4577-0374-4;
47
- 52.
M. Ferringer:
"Towards self-timed logic in the Time-Triggered Protocol";
Talk: DSN 2010 (International Conference on Dependable Systems and Networks),
Chicago, IL, USA;
2010-04-28
- 2010-04-30; in: "DSN 2010 - Full Program",
IEEE Computer Society,
(2010),
ISBN: 9781424477289;
136
- 141.
M. Ferringer, G. Fuchs, A. Steininger, G. Kempf:
"VLSI Implementation of a Fault-Tolerant Distributed Clock Generation";
Talk: International Symp. on Defect and Fault Tolerance in VLSI-Systems,
Arlington;
2006-10-04
- 2006-10-06; in: "The 21st IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems",
(2006),
563
- 571.
C. Fetzer, U. Schmid:
"Brief Announcement: On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times";
Talk: 23th ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC),
St. John´s , Newfoundland, Canada;
2004-07-25
- 2004-07-28; in: "23th ACM SIGACT-SIGOPS Symposium on PRINCIPLES of DISTRIBUTED commuting (PODC)",
(2004),
402.
W. Forster, C. Kutschera, A. Steininger, K. Göschka:
"Automated Generation of Explicit Connectors for Component Based Hardware/Software Interaction in Embedded Real-Time Systems";
Talk: 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008),
Miami, Florida, USA;
2008-04-14; in: "Proceedings of the 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS 2008), (IPDPS 2008)",
IEEE Computer Society,
(2008),
ISBN: 978-1-4244-1694-3;
1
- 8.
W. Friesenbichler, T. Panhofer, M. Delvai:
"Improving Fault Tolerance by Using Reconfigurable Asynchronous Circuits";
Talk: 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2008,
Bratislava, Slovakia;
2008-04-16
- 2008-04-18; in: "Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on",
IEEE,
(2008),
ISBN: 978-1-4244-2276-0;
267
- 270.
W. Friesenbichler, T. Panhofer, A. Steininger:
"A Deterministic Approach for Hardware Fault Injection in Asynchronous QDI Logic";
Talk: DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems),
Vienna, Austria;
2010-04-14
- 2010-04-16; in: "13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems",
IEEE,
(2010),
ISBN: 9781424466108;
317
- 322.
W. Friesenbichler, T. Panhofer, A. Steininger:
"Implementation of Self-Healing Asynchronous Circuits at the Example of a Video-Processing Algorithm";
Talk: WSDN 2010 (4th Workshop on Dependable and Secure Nanocomputing,
Chicago, IL, USA;
2010-06-28
- 2010-07-01; in: "WSDN - Full Program",
IEEE Computer Socitey,
(2010),
ISBN: 9781424477289;
129
- 134.
W. Friesenbichler, T. Panhofer, A. Steininger:
"Reliability Estimation and Experimental Results of a Self-Healing Asynchronous Circuit: A Case Study";
Talk: NASA/ESA 2010 (Conference on Adaptive Hardware and Systems),
Anaheim, CA, USA;
2010-06-15
- 2010-06-18; in: "NASA/ESA 2010 Proceedings",
IEEE Computer Society,
(2010),
ISBN: 9781424458882;
97
- 104.
W. Friesenbichler, A. Steininger:
"Soft Error Tolerant Asynchronous Circuits based on Dual Redundant Four State Logic";
Talk: DSD 2009 (Euromicro Conference on Digital System Design),
Patras, Greece;
2009-08-27
- 2009-08-29; in: "12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD 2009",
IEEE Computer Society,
(2009),
ISBN: 9780769537825;
100
- 107.
B. Fritz, V. S. Veeravalli, A. Steininger:
"Reliable Gateway for Radiation Experiments on a VLSI Chip";
Poster: Austrochip 2012,
Graz, Austria;
2012-10-10; in: "Austrochip 2012",
(2012),
65
- 70.
B. Fritz, V. S. Veeravalli, A. Steininger, V. Simek:
"Setup for an Experimental Study of Radiation Effects in 65nm CMOS";
Talk: 20th Euromicro Conference on Digital System Design,
Wien;
2017-08-30
- 2017-09-01; in: "Proceedings of the 20th Euromicro Conference on Digital System Design",
(2017),
329
- 336.
K. Fruzsa:
"Hope for Epistemic Reasoning with Faulty Agents!";
Talk: 31st European Summer School in Logic, Language and Information (ESSLLI 2019),
Riga, Latvia;
2019-08-05
- 2019-08-16; in: "ESSLLI 2019 Student Session",
(2019),
169
- 180.
K. Fruzsa, R. Kuznets, U. Schmid:
"Fire!";
Talk: TARK 2021: Theoretical Aspects of Rationality and Knowledge,
online, China;
2021-06-25
- 2021-06-28; in: "Proceedings of the Eighteenth Conference on Theoretical Aspects of Rationality and Knowledge",
Electronic Proceedings in Theoretical Computer Science,
335
(2021),
ISSN: 2075-2180;
139
- 153.
G. Fuchs:
"Implications of VLSI Fault Models and Distributed Systems Failure Models --- A Hardware Designer's View";
Talk: Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips,
Dagstuhl, Germany;
2009-09-07
- 2009-09-10; in: "Fault-Tolerant Distributed Algorithms on VLSI Chips",
Leibniz Zentrum Informatik,
08371
(2009),
ISSN: 1862-4405;
?.
G. Fuchs, M Függer, U. Schmid, A. Steininger:
"Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip";
Talk: 11th EUROMICRO Conference on Digital System Design (DSD 2008),
Parma, Italien;
2008-09-03
- 2008-09-05; in: "11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, DSD 2008.",
IEEE,
(2008),
ISBN: 978-0-7695-3277-6;
242
- 249.
G. Fuchs, M Függer, A. Steininger:
"On the Threat of Metastability in an Asynchronous Fault-Tolerant Clock Generation Scheme";
Talk: ASYNC 2009 (International Symposium on Asynchronous Circuits and Systems),
Chapel Hill, North Carolina;
2009-05-17
- 2009-05-20; in: "ASYNC 2009",
IEEE Computer Society,
(2009),
ISSN: 1522-8681;
127
- 136.
G. Fuchs, M Függer, A. Steininger, F. Zangerl:
"Analysis of Constraints in a Fault-Tolerant Distributed Clock Generation Scheme";
Talk: 3rd International Workshop on Dependable Embedded Systems,
Leeds;
2006-10-01; in: "WDES 2006 3rd Workshop on Dependable Embedded Systems",
(2006),
22
- 27.
G. Fuchs, J. Grahsl, U. Schmid, A. Steininger, G. Kempf:
"Threshold Modules -- Die Schlüsselelemente zur Verteilten Generierung eines Fehlertoleranten Taktes";
Talk: Austrochip,
Wien;
2006-10-11; in: "Austrochip Mikroelektroniktagung",
(2006),
149
- 156.
M Függer, A. Dielacher, U. Schmid:
"How to Speed-Up Fault-Tolerant Clock Generation in VLSI Systems-on-Chip via Pipelining";
Talk: EDCC - 8 (European Dependable Computing Conference),
Valencia, Spain;
2010-04-28
- 2010-04-30; in: "Proceedings of the Eight European Dependable Computing Conference",
IEEE Computer Society,
(2010),
ISBN: 9780769540078;
230
- 239.
M Függer, G. Fuchs, A. Steininger:
"On the Stability and Robustness of Non-Synchronous Circuits with Timing Loops";
Talk: WSDN 2009 (Workshop on Dependable and Secure Nanocomputing,
Estoril, Lisbon, Portugal;
2009-06-29
- 2009-06-30; in: "WSDN 2009",
Springer,
(2009),
ISBN: 9781424444212;
45
- 50.
M Függer, T. Handl, A. Steininger, J. Widder, C. Tögel:
"An Efficient Test for a Transition Signalling based Up-/Down-Counter";
Poster: Austrochip,
Wien;
2006-10-11; in: "Austrochip Mikroelektroniktagung",
(2006),
55
- 62.
M Függer, A. Kinali, C. Lenzen, T. Polzer:
"Metastability-aware memory-efficient time-to-digital converter";
Talk: 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017),
San Diego, California;
2017-05-21
- 2017-05-24; in: "Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017)",
IEEE Computer Society,
10662 Los Vaqueros Circle
(2017),
ISBN: 978-1-5386-2749-5;
49
- 56.
M Függer, A. Kinali, C. Lenzen, B. Wiederhake:
"Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance";
Talk: 24th IEEE International Symposium on Asynchronous Circuits and Systems,
Wien;
2018-05-13
- 2018-05-16; in: "24th IEEE International Symposium on Asynchronous Circuits and Systems",
Proceedings of the 24th IEEE International Symposium on Asynchronous Circuits and Systems,
(2018),
68
- 77.
M Függer, A. Kößler, T. Nowak, U. Schmid, M. Zeiner:
"The Effect of Forgetting on the Performance of a Synchronizer";
Talk: ALGOSENSORS 2013 (9th International Symposium on Algorithms and Experiments for Sensor Systems, Wireless Networks and Distributed Robotics),
Sophia Antipolis, France;
2013-09-05
- 2013-09-06; in: "Algorithms for Sensor Systems",
(2013),
185
- 200.
M Függer, A. Kößler, T. Nowak, M. Zeiner:
"Brief Announcement: The Degrading Effect of Forgetting on a Synchronizer";
Talk: 14th International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2012),
Toronto, Canada;
2012-10-01
- 2012-10-04; in: "Stabilization, Safety, and Security of Distributed Systems",
Lecture Notes in Computer Science,
7596
(2012),
ISBN: 978-3-642-33535-8;
90
- 91.
M Függer, J. Maier, R. Najvirt, T. Nowak, U. Schmid:
"A Faithful Binary Circuit Model with Adversarial Noise";
Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18),
Dresden, Deutschland;
2018-03-19
- 2018-03-23; in: "Proceedings of the 2018 Design, Automation & Test in Europe (DATE)",
(2018),
ISBN: 978-3-9819263-1-6;
1327
- 1332.
M Függer, R. Najvirt, T. Nowak, U. Schmid:
"Towards binary circuit models that faithfully capture physical solvability";
Talk: Design, Automation & Test in Europe Conference & Exhibition (DATE'15),
Grenoble, France;
2015-03-09
- 2015-03-13; in: "Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE'15)",
(2015),
ISBN: 978-3-9815370-4-8;
1455
- 1460.
M Függer, T. Nowak, U. Schmid:
"Unfaithful Glitch Propagation in existing Binary Circuit Models";
Talk: 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013),
Santa Monica, CA;
2013-05-19
- 2013-05-22; in: "Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on",
(2013),
ISSN: 1522-8681;
191
- 199.
M Függer, T. Nowak, M. Schwarz:
"Brief Announcement: Lower Bounds for Asymptotic Consensus in Dynamic Networks";
Talk: 31st International Symposium on Distributed Computing (DISC 2017),
Wien;
2017-10-17
- 2017-10-19; in: "Leibniz International Proceedings in Informatics (LIPIcs)",
(2017),
ISSN: 1868-8969;
3 pages.
M Függer, T. Nowak, M. Schwarz:
"Tight Bounds for Asymptotic and Approximate Consensus";
Talk: 37th ACM Symposium on Principles of Distributed Computing (PODC'18),
Royal Holloway, University of London, Egham, United Kingdom;
2018-07-23
- 2018-07-27; in: "Proceedings of the 2018 ACM Symposium on Principles of Distributed Computing (PODC '18)",
ACM,
(2018),
ISBN: 978-1-4503-5795-1;
325
- 334.
M Függer, U. Schmid, G. Fuchs, G. Kempf:
"Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip";
Talk: European Dependable Computing Conference,
Coimbra;
2006-10-18
- 2006-10-20; in: "EDCC-6",
(2006),
87
- 96.
M Függer, J. Widder:
"Efficient Checking of Link-Reversal-Based Concurrent Systems";
Talk: International Conference on Concurrency Theory (CONCUR),
Newcaslte upon Tyne, UK;
2012-09-03
- 2012-09-08; in: "CONCUR 2012 - Concurrency Theory",
Lecture Notes in Computer Science. Springer Verlag.,
7454
(2012),
ISBN: 978-3-642-32939-5;
486
- 499.
R. Gallo, M. Delvai, W. Elmenreich, A. Steininger:
"Revision and Verification of an Enhanced UART";
Talk: IEEE International Workshop on Factory Communication Systems,
Vienna, Austria;
2004-09-22
- 2004-09-24; in: "Proceedings of the 2004 IEEE International Workshop on Factory Communication Systems",
IEEE,
(2004),
ISBN: 0-7803-8734-1;
315
- 318.
J. Grahsl, T. Handl, A. Steininger:
"Exploring the Usefulness of the Gate-level Stuck-at Fault Model for Muller C-Elements";
Poster: 20. GI/ITG/GMM Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen,
Wien;
2008-02-24
- 2008-02-26; in: "20. Workshop Testmethoden und Vuverlässigkeit von Schaltungen und Systemen",
(2008),
165
- 169.
J. Grahsl, T. Handl, A. Steininger, G. Kempf:
"SAFE - A Scalable Environment for Automated Transistor Level Fault Effect Analysis";
Talk: Austrochip,
Graz;
2007-10-11; in: "Austrochip - Workshop on Microelectronics",
(2007),
91
- 98.
G. Gridling, B. Thallner:
"Simulation of a Wireless CDMA ad hoc network";
Talk: IASTED Int. Conf. Communictions and Computer Networks,
Cambridge, USA;
2002-11-04
- 2002-11-06; in: "Proceedings of the IASTED Internatonal Conference on Communications and Computer Networks",
(2002),
ISBN: 0-88986-329-6;
354
- 359.
G. Gridling, B. Weiss:
"A µController Lab for Distance Learning";
Talk: 6th International Workshop on Microelectronics Education,
Stockholm;
2006-06-08
- 2006-06-09; in: "EWME 2006 - Proceedings",
(2006),
129
- 132.
G. Gridling, B. Weiss, W. Elmenreich, C. Trödhandl:
"Embedded Systems Exams With True/False Questions: A Case Study";
Talk: Second IASTED International Conference on Education and Technology,
Calgary;
2006-07-17
- 2006-07-19; in: "Proceedings of the Second International Conference on Education and Technology",
(2006),
168
- 172.
M. Hailesellasie, S. R. Hasan, F. Khalid, F. Awwad, M. Shafique:
"FPGA-Based Convolutional Neural Network Architecture with Reduced Parameter Requirements";
Talk: 2018 IEEE International Symposium on Circuits and Systems (ISCAS),
Florence, Italy;
2018-05-27
- 2018-05-30; in: "2018 IEEE International Symposium on Circuits and Systems (ISCAS)",
(2018),
ISBN: 978-1-5386-4881-0;
1
- 5.
T. Handl, A. Steininger:
"Implementation of an FPGA-Based Hardware Fault Injector";
Poster: Junior Scientist Conference,
Wien;
2006-04-19
- 2006-04-21; in: "Junior Scientist Conference 2006",
(2006),
23
- 24.
T. Handl, A. Steininger, G. Kempf:
"Adopting the Scan Approach for a Fault Tolerant Asynchronous Clock Generation Circuit";
Talk: International Design and Test Workshop (IDT),
Kairo;
2007-12-16
- 2007-12-18; in: "Proceedings IDT'07 - The Second International Design and Test Workshop",
(2007),
115
- 119.
T. Handl, A. Steininger, G. Kempf:
"An Efficient Test Strategy for a Fault-Tolerant Clock Generator for Systems-on-Chip";
Talk: 19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen,
Errlangen;
2007-03-11
- 2007-03-13; in: "19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen",
(2007),
66
- 70.
M. Hanif, M. Akbar, R. Ahmed, S. Rehman, A. Jantsch, M. Shafique:
"MemGANs: Memory Management for Energy-Efficient Acceleration of Complex Computations in Hardware Architectures for Generative Adversarial Networks";
Talk: 2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED),
Lausanne, Switzerland;
2019-07-29
- 2019-07-31; in: "Proceeding of 2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED'19)",
IEEE,
(2019),
ISBN: 978-1-7281-2954-9;
1
- 6.
M. Hanif, R. Hafiz, O. Hasan, M. Shafique:
"PEMACx: A Probabilistic Error Analysis Methodology for Adders with Cascaded Approximate Units";
Talk: 2020 57th ACM/IEEE Design Automation Conference (DAC),
San Fransisco, USA (Virtual);
2020-07-20
- 2020-07-24; in: "Proceedings of 2020 57th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2020),
ISSN: 0738-100x;
1
- 6.
M. Hanif, R. Hafiz, O. Hasan, M. Shafique:
"QuAd: Design and Analysis of Quality-Area Optimal Low-Latency Approximate Adders";
Talk: 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17),
Austin, Texas, USA;
2017-06-18
- 2017-06-22; in: "Proceedings of the 54th Annual Design Automation Conference (DAC) 2017",
ACM,
(2017),
ISBN: 978-1-4503-4927-7;
42:1
- 42:6.
M. Hanif, R. Hafiz, M. Shafique:
"Error Resilience Analysis for Systematically Employing Approximate Computing in Convolutional Neural Networks";
Poster: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18),
Dresden, Deutschland;
2018-03-19
- 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)",
(2018),
ISBN: 978-3-9819263-1-6;
913
- 916.
M. Hanif, L. Hoang, M. Shafique:
"Cross-Layer Approaches for Improving the Dependability of Deep Learning Systems";
Talk: 2020 23th International Workshop on Software and Compilers for Embedded Systems (SCOPES),
St. Goar, Germany;
2020-05-25
- 2020-05-26; in: "Proceedings of the 2020 23th International Workshop on Software and Compilers for Embedded Systems (SCOPES)",
ACM,
(2020),
78
- 81.
M. Hanif, F. Khalid, R. Putra, S. Rehman, M. Shafique:
"Robust Machine Learning Systems: Reliability and Security for Deep Neural Networks";
Talk: 24th IEEE International Symposium on On-Line Testing And Robust System Design (IOLTS'18),
Platja d'Aro, Spain;
2018-07-02
- 2018-07-04; in: "2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design (IOLTS)",
(2018),
ISBN: 978-1-5386-5992-2;
257
- 260.
M. Hanif, F. Khalid, M. Shafique:
"CANN: Curable Approximations for High-Performance Deep Neural Network Accelerators";
Talk: 2019 56th ACM/IEEE Design Automation Conference (DAC),
Las Vegas, USA;
2019-06-02
- 2019-06-06; in: "Proceedings of 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE)",
IEEE,
(2019),
ISBN: 978-1-4503-6725-7;
1
- 6.
M. Hanif, M. Shafique:
"Dependable Deep Learning: Towards Cost-Efficient Resilience of Deep Neural Network Accelerators against Soft Errors and Permanent Faults";
Talk: 2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Napoli, Italy;
2020-07-13
- 2020-07-15; in: "Proceedings of 2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS)",
IEEE,
(2020),
ISBN: 978-1-7281-8187-5;
1
- 4.
M. Hanif, M. Shafique:
"DNN-Life: An Energy-Efficient Aging Mitigation Framework for Improving the Lifetime of On-Chip Weight Memories in Deep Neural Network Hardware Architectures";
Talk: 2021 Design, Automation & Test in Europe,
Online;
2021-02-01
- 2021-02-05; in: "Proceedings of the 2021 Design, Automation & Test in Europe",
(2021),
729
- 734.
K. Hendling, T. Losert, W. Huber, M. Jandl:
"Interference Minimizing Bandwidth Guaranteed On-Line Routing Algorithm for Traffic Engineering";
Talk: IEEE International Conference on Networks (2004, 12th ICON),
Singapur;
2004-11-16
- 2004-11-19; in: "Proceedings of the IEEE International Conference on Networks (2004, 12th ICON) ",
IEEE,
Volume 2
(2004),
ISBN: 0-7803-8783-x;
497
- 503.
S. Hepp, G. Klima, A. Kadlec, L. Krammer, W. Luckner, D. Prokesch, S. Resch, A. Wasicek, J. Wilhelm, P Tummeltshammer, M. Delvai:
"Exploring Hardware Software Partitioning on the Example of a Fingerprint Verification System";
Talk: 16th Austrian Workshop on Microelectronics (Austrochip),
Linz;
2008-10-08; in: "Proc. of the 16th Austrian Workshop on Microelectronics 2008",
(2008),
7
- 12.
J.-F. Hermant, J. Widder:
"Implementing Reliable Distributed Real Time Systems with the Theta Model";
Talk: International Conference on Principles of Distributed Systems,
Pisa;
2005-12-12
- 2005-12-14; in: "9th International Conference on Principles of Distributed Systems",
(2005),
259
- 271.
D. Hernandez-Araya, J. Castro-Godinez, M. Shafique, J. Henkel:
"AUGER: A Tool for Generating Approximate Arithmetic Circuits";
Talk: 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS),
San Jose, Costa Rica;
2020-02-25
- 2020-02-28; in: "Proceedings of 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS)",
IEEE,
(2020),
ISBN: 978-1-7281-3427-7;
1
- 4.
L. Hoang, M. Hanif, M. Shafique:
"FT-ClipAct: Resilience Analysis of Deep Neural Networks and Improving their Fault Tolerance using Clipped Activation";
Talk: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Grenoble, France;
2020-03-09
- 2020-03-13; in: "Proceedings of 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)",
IEEE,
(2020),
ISBN: 978-3-9819263-4-7;
1241
- 1246.
L. Hoang, M. Hanif, M. Shafique:
"TRe-Map: Towards Reducing the Overheads of Fault-Aware Retraining of Deep Neural Networks by Merging Fault Maps";
Talk: 2021 24th Euromicro Conference on Digital System Design,
Virtual Conference;
2021-09-01
- 2021-09-03; in: "Proceedings of the 2021 24th Euromicro Conference on Digital System Design",
(2021),
434
- 441.
R. Höller, M. Horauer, G. Gridling, N. Kerö, U. Schmid, K. Schossmaier:
"SynUTC - high precision time synchronization over Ethernet networks";
Talk: 8th Workshop on Electronics for LHC Experiments,
Colmar; France;
2002-09-09
- 2002-09-13; in: "Proceedings 8th Workshop on Electronics for LHC Experimets (LECC'02)",
(2002),
ISBN: 92-9083-202-9;
428
- 432.
M. Hofbauer, K. Schweiger, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger:
"Supply Voltage Dependent On-chip Single Event Transient Pulse Shape Measurements in 90 nm Bulk CMOS under Alpha Irradiation";
Poster: 21st European Conference on Radiation and its Effects on Components and Systems (RADECS'12),
Biarritz, FRANCE;
2012-09-24
- 2012-09-28; in: "Proceedings 21st European Conference on Radiation and its Effects on Components and Systems (RADECS'12)",
(2012).
M. Horauer, E. Armengaud, A. Steininger:
"Concepts and Tools for the Test of the Communication Sub-System of Time-Triggered Distributed Embedded Systems";
Talk: International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering (ASME),
Las Vegas;
2007-09-04
- 2007-09-07; in: "ASME 2007 International Conference on Design Engineering Technical Conferences & Computers and Information in Engineering",
(2007).
M. Horauer, F Rothensteiner, M Zauner, E. Armengaud, A. Steininger, H. Friedl, R. Pallierer:
"An FPGA based SoC Design for Testing Embedded Automotive Communication Systems employing the FlexRay Protocol";
Poster: Austrochip,
Wien;
2004; in: "Austrochip 2004",
TU-Wien,
(2004),
119
- 123.
M. Horauer, U. Schmid, K. Schossmaier, R. Höller, N. Kerö:
"PSynUTC --- evaluation of a high precision time synchronization prototype system for Ethernet LANs.";
Talk: IEEE Precise Time and Time Interval Systems and Application Meeting,
Reston, Virginia, USA;
2002-12-03
- 2002-12-05; in: "Proceedings of the 34th IEEE Precise Time and Time Interval Systems and Application Meeting (PTTI'02)",
(2003),
263
- 278.
F. Huemer, J. Lechner, A. Steininger:
"A New Coding Scheme for Fault Tolerant 4-Phase Delay-Insensitive Codes";
Poster: 2016 IEEE International Conference on Computer Design,
Phoenix, Arizona, USA;
2016-10-03
- 2016-10-05; in: "Proceedings 2016 IEEE International Conference on Computer Design",
(2016),
ISBN: 978-1-5090-5142-7;
392
- 395.
F. Huemer, R. Najvirt, A. Steininger:
"Identification and Confinement of Fault Sensitivity Windows in QDI Logic";
Talk: 28th Austrian Workshop on Microelectronics,
Wien;
2020-10-07; in: "Proceedings 28th Austrian Workshop on Microelectronics",
(2020),
1
- 8.
F. Huemer, M. Schütz, A. Steininger:
"Revisiting Sorting Network based Completion Detection for 4 Phase Delay Insensitive Codes";
Talk: Austrochip Workshop on Microelectronics,
Wien;
2015-09-28; in: "Austrochip Workshop on Microelectronics",
(2015),
6 pages.
F. Huemer, A. Steininger:
"Sorting Network based Full Adders for QDI Circuits";
Talk: 28th Austrian Workshop on Microelectronics,
Wien;
2020-10-07; in: "Proceedings 28th Austrian Workshop on Microelectronics",
(2020),
1
- 8.
F. Huemer, A. Steininger:
"Timing Domain Crossing using Muller Pipelines";
Talk: 26th IEEE International Symposium on Asynchronous Circuits and Systems,
Snowbird, Utah, USA;
2020-05-17
- 2020-05-20; in: "Proceedings 26th IEEE International Symposium on Asynchronous Circuits and Systems",
Ieee Cs,
(2020),
ISSN: 2643-1483;
1
- 10.
S. Hussain, M. Shafique, J. Henkel:
"A Fine-Grained Soft Error Resilient Architecture under Power Considerations";
Talk: 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE'19),
Florence, Italy;
2019-03-25
- 2019-03-29; in: "Proceedings of 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE)",
IEEE,
(2019),
ISBN: 978-3-9819263-2-3;
972
- 975.
S. Hussain, M. Shafique, J. Henkel:
"Thermal-Awareness in a Soft Error Tolerant Architecture";
Talk: 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE'19),
Florence, Italy;
2019-03-25
- 2019-03-29; in: "Proceedings of 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE)",
IEEE,
(2019),
ISBN: 978-3-9819263-2-3;
1555
- 1558.
M. Hutle:
"An efficient failure detector for sparsely connected networks";
Talk: 22nd IASTED International Multi-Conference on Applied Informatics,
Innsbruck, Austria;
2004-02-17
- 2004-02-19; in: "Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks ",
Acta Press,
(2004),
ISSN: 1027-2666;
369
- 374.
M. Hutle:
"On omega in sparse networks (Fast Abstract)";
Talk: 20th IEEE International Conference on Software Maintenance (ICSM'04),
Papeete,Tahiti,French Polynesia;
2004-03-03
- 2004-03-05; in: "Proceedings of the 10th IEEE International Symposium Pacific Rim Dependable Computing ",
LAAS-CNRS,
(2004),
37
- 38.
M. Hutle, D. Malkhi, U. Schmid, L. Zhou:
"Brief Announcement: Chasing the Weakest System Model for Implementing Omega and Consensus";
Talk: 8th International Symposium on Stabilization, Safety, and Security of Distributed Systems,
Dallas;
2006-11-17
- 2006-11-19; in: "Stabilization, Safety, and Security of Distributed Systems",
(2006).
M. Hutle, J. Widder:
"Brief Announcement: On the Possibility and the Impossibility of Message-Driven Self-Stabilizing Failure Detection";
Talk: ACM Symposium on Principles of Distributed Computing,
Las Vegas, Nevada;
2005-07-17
- 2005-07-20; in: "Proceedings of the 24th ACM Symposium on Principles of Distributed Computing",
(2005),
208.
M. Hutle, J. Widder:
"On the Possibility and the Impossibility of Message-Driven Self-Stabilizing Failure Detection";
Talk: Seventh International Symposium on Self Stabilizing Systems (SSS 2005),
Barcelona, Spanien;
2005-10-26
- 2005-10-27; in: "Self Stabilizing Systems",
(2005),
153
- 170.
M. Hutle, J. Widder:
"Self-Stabilizing Failure Detector Algorithms";
Talk: IASTED International Conference on Parallel and Distributed Computing Systems,
Innsbruck, Austria;
2005-02-15
- 2005-02-17; in: "IASTED International Conference on Parallel and Distributed Computing and Networks",
(2005),
ISBN: 0-88986-468-3;
485
- 490.
M. Jankela, W. Puffitsch, W. Huber:
"Towards a Rapid Prototyping Framework for Architecture Exploration in Embedded Systems";
Talk: Workshop on Intelligent Solutions in Embedded Systems,
Graz, Austria;
2004-06-25; in: "Proceedings of the Second Workshop on Intelligent Solutions im Embedded Systems",
(2004),
ISBN: 3902463007;
117
- 127.
R. Javed, A. Siddique, R. Hafiz, O. Hasan, M. Shafique:
"ApproxCT: Approximate Clustering Techniques for Energy Efficient Computer Vision in Cyber-Physical Systems";
Talk: 2018 12th International Conference on Open Source Systems and Technologies (ICOSST),
Lahore, Pakistan;
2018-12-19
- 2018-12-21; in: "Proceeding of 2018 International Conference on Open Source Systems and Technologies (ICOSST)",
IEEE,
(2018),
ISBN: 978-1-5386-9564-7;
64
- 70.
M. Jeitler, M. Delvai, S. Reichör:
"Fuse - A Hardware Accelerated Hdl Fault Injection Tool";
Talk: SPL 2009 (Southern Conference on Programmable Logic),
Sao Carlos, Brazil;
2009-04-01
- 2009-04-03; in: "2009",
IEEE,
(2009),
ISBN: 9781424438464;
89
- 94.
M. Jeitler, J. Lechner:
"Comparing the Robustness of Synchronous and Asynchronous Circuits by Fault Injection";
Talk: MEMICS 2009 (Mathematical and Engineering Methods in Computer Science),
Znojmo;
2009-11-13
- 2009-11-15; in: "MEMICS 2009 proceedings",
Universität Brno,
(2009),
ISBN: 9788087342046;
110
- 117.
M. Jeitler, J. Lechner:
"Low Latency Recovery from Transient Faults for Pipelined Processor Architectures";
Talk: DSD 2010 (Euromicro Conference on Digital System Design),
Lille, France;
2010-09-01
- 2010-09-03; in: "Proceedings DSD 2010 (Euromicro Conference on Digital System Design)",
IEEE Computer Society,
(2010),
ISBN: 9780769541716;
219
- 225.
M. Jeitler, J. Lechner:
"Speeding up Fault Injection for Asynchronous Logic by FPGA-based Emulation";
Poster: ReConFig 2009 (International Conference on ReConFigurable Computing and FPGAs),
Cancun, Quintana Roo, Mexico;
2009-12-09
- 2009-12-11; in: "ReConFig'09",
CPS,
(2009),
ISBN: 9780769539171;
65
- 70.
M. Jeitler, J. Lechner, A. Steininger:
"Enhancing Pipelined Processor Architectures with Fast Autonomous Recovery of Transient Faults";
Poster: DDECS 2010 (Design and Diagnostics of Electronic Circuits and Systems),
Vienna, Austria;
2010-04-14
- 2010-04-16; in: "13th IEEE International Symposium On Design And Diagnostics Of Electronic Cicruits And Systems",
IEEE Computer Society,
(2010),
ISBN: 9781424466108;
233
- 236.
A. John, I. Konnov, U. Schmid, H. Veith, J. Widder:
"Brief announcement: parameterized model checking of fault-tolerant distributed algorithms by abstraction";
Talk: ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing (PODC),
Montreal, Kanada;
2013-07-22
- 2013-07-24; in: "PODC",
ACM,
(2013),
ISBN: 978-1-4503-2065-8;
119
- 121.
A. John, I. Konnov, U. Schmid, H. Veith, J. Widder:
"Parameterized model checking of fault-tolerant distributed algorithms by abstraction";
Talk: International Conference on Formal Methods in Computer-Aided Design (FMCAD),
Portland, OR, USA;
2013-10-20
- 2013-10-23; in: "FMCAD",
(2013),
ISBN: 978-0-9835678-3-7;
201
- 209.
A. John, I. Konnov, U. Schmid, H. Veith, J. Widder:
"Towards Modeling and Model Checking Fault-Tolerant Distributed Algorithms";
Talk: International SPIN Symposium on Model Checking of Software (SPIN),
Stony Brook, NY, USA;
2013-07-08
- 2013-07-09; in: "SPIN",
LNCS, Springer,
7976
(2013),
ISBN: 978-3-642-39175-0;
209
- 226.
W. Kastner, B. Thallner:
"A General Public License Linux Device Driver for the EIB";
Talk: EIB Scientific Conference and Technology Workshop,
Munich, Germany;
2001-10-04
- 2001-10-05; in: "EIB-Proceedings V",
(2001).
W. Kastner, B. Thallner:
"Connecting EIB to Linux and Java";
Talk: 6th IEEE Africon Conference,
George, South Africa;
2002-10-04; in: "Proceedings of the IEEE 6th AFRICON Conference",
(2002),
ISBN: 0-7803-7570-x;
273
- 276.
F. Khalid, H. Ali, M. Hanif, S. Rehman, R. Ahmed, M. Shafique:
"FaDec: A Fast Decision-based Attack for Adversarial Machine Learning";
Talk: 2020 International Joint Conference on Neural Networks (IJCNN),
Glasgow, UK;
2020-07-19
- 2020-07-24; in: "Proceedings of 2020 International Joint Conference on Neural Networks (IJCNN)",
IEEE,
(2020),
ISBN: 978-1-7281-6926-2;
1
- 8.
F. Khalid, H. Ali, H. Tariq, M. Hanif, S. Rehman, R. Ahmed, M. Shafique:
"QuSecNets: Quantization-based Defense Mechanism for Securing Deep Neural Network against Adversarial Attacks";
Talk: 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Rhodes, Greece;
2019-07-01
- 2019-07-03; in: "Proceeding of 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS'19)",
IEEE,
(2019),
ISBN: 978-1-7281-2490-2;
182
- 187.
F. Khalid, M. Hanif, S. Rehman, R. Ahmed, M. Shafique:
"TrISec: Training Data-Unaware Imperceptible Security Attacks on Deep Neural Networks";
Talk: 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Rhodes, Greece;
2019-07-01
- 2019-07-03; in: "Proceeding of 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS'19)",
IEEE,
(2019),
ISBN: 978-1-7281-2490-2;
188
- 193.
F. Khalid, M. Hanif, S. Rehman, J. Qadir, M. Shafique:
"FAdeML: Understanding the Impact of Pre-Processing Noise Filtering on Adversarial Machine Learning";
Talk: 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE'19),
Florence, Italy;
2019-03-25
- 2019-03-29; in: "Proceedings of 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE)",
IEEE,
(2019),
ISBN: 978-3-9819263-2-3;
902
- 907.
F. Khalid, M. Hanif, S. Rehman, M. Shafique:
"Security for Machine Learning-based Systems: Attacks and Challenges during Training and Inference";
Talk: 16th International Conference on Frontiers of Information Technology (FIT),
Islamabad, Pakistan;
2018-12-17
- 2018-12-19; in: "16th International Conference on Frontiers of Information Technology (FIT)",
(2018),
1
- 6.
F. Khalid, M. Hanif, M. Shafique:
"Exploiting Vulnerabilities in Deep Neural Networks: Adversarial and Fault-Injection Attacks";
Talk: The Fifth International Conferenceon Cyber-Technologies and Cyber-Systems,
Nice, France;
2020-10-25
- 2020-10-29; in: "Proceedings of the Fifth International Conferenceon Cyber-Technologies and Cyber-Systems",
(2020),
ISBN: 978-1-61208-818-1;
24
- 29.
F. Khalid, S. Nanjiani, S. R. Hasan, O. Hasan, F. Awwad, M. Shafique:
"Low Power Digital Clock Multipliers for Battery-Operated Internet of Things (IoT) Devices";
Talk: 2018 IEEE International Symposium on Circuits and Systems (ISCAS),
Florence, Italy;
2018-05-27
- 2018-05-30; in: "2018 IEEE International Symposium on Circuits and Systems (ISCAS)",
(2018),
ISBN: 978-1-5386-4881-0;
1
- 5.
G. Khyo, P. Puschner, M. Delvai:
"An Operating System for a Time-Predictable Computing Node";
Talk: The 6th IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2008),
Capri, Italien;
2008-10-01
- 2008-10-03; in: "Software Technologies for Embedded and Ubiquitous Systems",
Lecture Notes in Computer Science / Springer Verlag,
5287
(2008),
ISBN: 978-3-540-87784-4;
150
- 161.
A. Kinali, F. Huemer, C. Lenzen:
"Fault-tolerant Clock Synchronization with High Precision";
Talk: 2016 IEEE Computer Society Annual Symposium on VLSI,
Pittsburgh, PA, USA;
2016-07-11
- 2016-07-13; in: "Proc. 2016 IEEE Computer Society Annual Symposium on VLSI",
(2016),
490
- 495.
A. Kößler, H. Moser, U. Schmid:
"Real-Time Analysis of Round-based Distributed Algorithms";
Talk: RTSOPS 2010 (1st International Real-Time Scheduling Open Problems Seminar),
Brussels, Belgium;
2010-07-06
- 2010-07-09; in: "Proceedings of the 1st International Real-Time Scheduling Open Problems Seminar",
(2010),
9
- 11.
I. Konnov, M. Lazić, H. Veith, J. Widder:
"A short counterexample property for safety and liveness verification of fault-tolerant distributed algorithms";
Talk: 44th ACM SIGPLAN Symposium on Principles of Programming Languages (POPL),
Paris, France;
2017-01-18
- 2017-01-20; in: "POPL",
ACM,
Paris
(2017),
ISBN: 978-1-4503-4660-3;
719
- 734.
I. Konnov, H. Veith, J. Widder:
"SMT and POR beat Counter Abstraction: Parameterized Model Checking of Threshold-Based Distributed Algorithms";
Talk: International Conference on Computer Aided Verification (CAV),
San Francisco, CA, USA;
2015-07-18
- 2015-07-24; in: "Computer Aided Verification",
LNCS Springer,
9206
(2015),
ISBN: 978-3-319-21689-8;
85
- 102.
I. Konnov, H. Veith, J. Widder:
"What You Always Wanted to Know About Model Checking of Fault-Tolerant Distributed Algorithms";
Keynote Lecture: Perspectives of System Informatics: 10th International Andrei Ershov Informatics Conference,
Kazan, Russland (invited);
2015-08-25
- 2015-08-27; in: "Perspectives of System Informatics: 10th International Andrei Ershov Informatics Conference, PSI 2015",
LNCS / Springer,
9609
(2016),
6
- 21.
I. Konnov, J. Widder, F. Spegni, L. Spalazzi:
"Accuracy of Message Counting Abstraction in Fault-Tolerant Distributed Algorithms";
Talk: Verification, Model Checking, and Abstract Interpretation (VMCAI),
Paris;
2017-01-15
- 2017-01-17; in: "VMCAI 2017: Verification, Model Checking, and Abstract Interpretation",
Springer,
LNCS/10145/Paris
(2017),
ISBN: 978-3-319-52233-3;
347
- 366.
T. Kottke, A. Steininger:
"A Dual Core Architecture with Error Containment";
Talk: East-West Design & Test International Workshop(EWDTW´04),
Yalta-Alushta, Crimea, Ukraine;
2004-09-23
- 2004-09-26; in: "East-West Design & Test International Workshop",
(2004),
ISBN: 966-659-088-3;
102
- 108.
T. Kottke, A. Steininger:
"A Fail-Silent Reconfigurable Superscalar Processor";
Talk: 13th Pacific Rim International Symposium on Dependable Computing (PRDC 07),
Melbourne;
2007-12-17
- 2007-12-19; in: "13th Pacific Rim International Symposium on Dependable Computing (PRDC'07), Melbourne",
(2007),
232
- 239.
T. Kottke, A. Steininger:
"A Generic Dual-Core Architecture";
Talk: 7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004),
Stara Lesna, Slovakia;
2004-04-18
- 2004-04-21; in: "7th IEEE International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2004)",
(2004),
ISBN: 80-969117-9-1;
159
- 166.
T. Kottke, A. Steininger:
"A Reconfigurable Generic Dual-Core Architecture";
Talk: IEEE International Conference on Dependable Systems and Networks,
Philadelphia;
2006-06-25
- 2006-06-28; in: "Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN)",
(2006),
45
- 54.
T. Kottke, A. Steininger:
"Designoptimierung eines Prozessors mit Eigenfehlererkennung";
Talk: 17. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen;,
Inssbruck;
2005-02-27
- 2005-03-01; in: "16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen;",
(2005),
55
- 59.
T. Kottke, A. Steininger:
"Vergleich zweier zwischen Sicherheit und Performanz rekonfigurierbarer Prozessorsysteme";
Poster: 19. ITG/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen,
Errlangen;
2007-03-11
- 2007-03-13; in: "19. Workshop - Testmethoden und Zuverlässigkeit von Schaltungen und Systemen",
(2007).
F. Kriebel, S. Rehman, M. Hanif, F. Khalid, M. Shafique:
"Robustness for Smart Cyber Physical Systems and Internet-of-Things: From Adaptive Robustness Methods to Reliability and Security for Machine Learning";
Talk: 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI),
Hong Kong, China;
2018-07-08
- 2018-07-11; in: "2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)",
(2018),
ISBN: 978-1-5386-7099-6;
581
- 586.
F. Kriebel, S. Rehman, M. Shafique:
"Studying Aging and Soft Error Mitigation Jointly under Constrained Scenarios in Multi-Cores";
Talk: 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Rhodes, Greece;
2019-07-01
- 2019-07-03; in: "Proceeding of 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS'19)",
IEEE,
(2019),
ISBN: 978-1-7281-2490-2;
139
- 142.
J. Kukovec, I. Konnov, J. Widder:
"Reachability in Parameterized Systems: All Flavors of Threshold Automata";
Talk: International Conference on Concurrency Theory (CONCUR),
Bejing, China;
2018-09-04
- 2018-09-07; in: "29th International Conference on Concurrency Theory (CONCUR 2018)",
Schloss Dagstuhl - Leibniz-Zentrum für Informatik GmbH, Dagstuhl Publishing,
118
(2018),
ISBN: 978-3-95977-087-3;
19:1
- 19:17.
R. Kuznets, B. Lellmann:
"Interpolation for Intermediate Logics via Hyper- and Linear Nested Sequents";
Talk: Advances in Modal Logic 2018,
Bern, Schweiz;
2018-08-27
- 2018-08-31; in: "Advances in Modal Logic, Volume 12",
G. Bezhanishvili, G. D´Agostino, G Metcalfe, T. Studer (ed.);
College Publications,
(2018),
ISBN: 978-1-84890-255-8;
473
- 492.
R. Kuznets, L. Prosperi, U. Schmid, K. Fruzsa:
"Causality and Epistemic Reasoning in Byzantine Multi-Agent Systems";
Poster: TARK 2019: Theoretical Aspects of Rationality and Knowledge,
Toulouse, France;
2019-07-17
- 2019-07-19; in: "Proceedings Seventeenth Conference on Theoretical Aspects of Rationality and Knowledge (TARK 2019)",
L. Moss (ed.);
Electronic Proceedings in Theoretical Computer Science,
297
(2019),
ISSN: 2075-2180;
293
- 312.
R. Kuznets, L. Prosperi, U. Schmid, K. Fruzsa:
"Epistemic Reasoning with Byzantine-Faulty Agents";
Talk: FroCoS 2019: Frontiers of Combining Systems,
London, UK;
2019-09-04
- 2019-09-06; in: "Frontiers of Combining Systems, 12th International Symposium, FroCoS 2019, London, UK, September 4-6, 2019, Proceedings",
A. Herzig, A. Popescu (ed.);
Springer,
(2019),
ISBN: 978-3-030-29006-1;
259
- 276.
M. Lazić, I. Konnov, J. Widder, R. Bloem:
"Synthesis of Distributed Algorithms with Parameterized Threshold Guards";
Talk: International Conference On Principles Of Distributed Systems (OPODIS),
Lissabon;
2017-12-18
- 2017-12-20; in: "OPODIS",
LIPIcs-Leibniz International Proceedings in Informatics,
(2017),
32:1
- 32:20.
G. Le Lann, U. Schmid:
"Proof-Based Systems Engineering in ASSERT";
Talk: Data Systems in Aerospace,
Edinburgh;
2005-05-30
- 2005-06-02; in: "Proof-Based Systems Engineering in ASSERT",
(2005).
J. Lechner:
"Designing Robust GALS Circuits with Triple Modular Redundancy";
Talk: 2012 European Dependable Computing Conference (EDCC 2012),
Sibiu, Romania;
2012-05-08
- 2012-05-11; in: "Dependable Computing Conference (EDCC), 2012 Ninth European",
(2012),
227
- 236.
J. Lechner, M. Delvai:
"Implementation of a Design Tool for Automated Generation of Four State Logic Circuits";
Poster: Junior Scientist Conference 2008,
Wien;
2008-11-16
- 2008-11-18; in: "Proceedings of the Junior Scientist Conference 2008",
(2008),
ISBN: 978-3-200-01612-5;
85
- 86.
J. Lechner, M. Lampacher:
"Protecting Pipelined Asynchronous Communication Channels Against Single Event Upsets";
Talk: IEEE 30th International Conference on Computer Design (ICCD 2012),
Montreal, Canada;
2012-09-30
- 2012-10-03; in: "Computer Design (ICCD), 2012 IEEE 30th International Conference on",
(2012),
ISSN: 1063-6404;
480
- 481.
J. Lechner, M. Lampacher, T. Polzer:
"A Robust Asynchronous Interfacing Scheme with Four-Phase Dual-Rail Coding";
Talk: 2012 International Conference on Application of Concurrency to System Design (ACSD 2012),
Hamburg, Germany;
2012-06-27
- 2012-06-29; in: "Application of Concurrency to System Design (ACSD), 2012 12th International Conference on",
(2012),
ISSN: 1550-4808;
122
- 131.
J. Lechner, R. Najvirt:
"A Generic Architecture for Robust Asynchronous Communication Links";
Poster: International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012,
Newcastle upon Tyne;
2012-09-04
- 2012-09-06; in: "Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation",
Lecture Notes in Computer Science,
7606
(2013),
ISBN: 978-3-642-36156-2;
121
- 130.
J. Lechner, A. Steininger, F. Huemer:
"Methods for Analysing and Improving the Fault Resilience of Delay-Insensitive Codes";
Talk: 33rd IEEE International Conference on Computer Design,
New York City, USA;
2015-10-19
- 2015-10-21; in: "33rd IEEE International Conference on Computer Design",
(2015),
8 pages.
H. Lee, M. Shafique, M. Al Faruque:
"Low-overhead Aging-aware Resource Management on Embedded GPUs";
Talk: 2017 ACM/EDAC/IEEE 54th Design Automation Conference (DAC'17),
Austin, Texas, USA;
2017-06-18
- 2017-06-22; in: "Proceedings of the 54th Annual Design Automation Conference (DAC) 2017",
ACM,
(2017),
ISBN: 978-1-4503-4927-7;
67:1
- 67:6.
V. Legourski, C. Trödhandl, B. Weiss:
"A System for Automatic Testing of Embedded Software in Undergraduate Study Exercises";
Talk: Workshop on Embedded Systems Education,
Jersey City;
2005-09-22; in: "Proceedings Workshop on Embedded Systems Education (WESE'05)",
(2005),
44
- 51.
C. Lenzen, M Függer, M. Hofstätter, U. Schmid:
"Efficient Construction of Global Time in SoCs despite Arbitrary Faults";
Talk: 16th Euromicro Conference on Digital System Design (DSD 2013),
Santander, Spain;
2013-09-04
- 2013-09-06; in: "Dependable",
Digital System Design (DSD), 2013 Euromicro Conference on,
(2013),
142
- 151.
T. Losert, W. Huber, K. Hendling, M. Jandl:
"An Extensible Transport Framework for CORBA with Emphasis on Real-Time Capabilities";
Talk: Second IEEE International Conference on Computational Cybernetics 2004 (ICCC'04),
Vienna, Austria;
2004-08-30
- 2004-09-01; in: "Proceeding of ICCC'04",
(2004),
ISBN: 3-902463-01-5;
155
- 161.
J. Maier:
"Gain and Pain of a Reliable Delay Model";
Talk: 24th Euromicro Conference on Digital System Design DSD 2021,
Palermo;
2021-09-01
- 2021-09-03; in: "Proceedings 2021 24th Euromicro Conference on Digital System Design DSD 2021",
IEEE (ed.);
(2021),
ISBN: 978-1-6654-2703-6;
246
- 250.
J. Maier, M Függer, T. Nowak, U. Schmid:
"Transistor-Level Analysis of Dynamic Delay Models";
Talk: 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2019),
Hirosaki, Japan;
2019-05-12
- 2019-05-15; in: "2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)",
(2019),
ISBN: 978-1-5386-4747-9;
76
- 85.
J. Maier, D. Öhlinger, U. Schmid, M Függer, T. Nowak:
"A Composable Glitch-Aware Delay Model";
Talk: Great Lakes Symposium on VLSI GLSVLSI'21,
virtuell;
2021-06-22
- 2021-06-25; in: "Proceedings of the 2021 Great Lakes Symposium on VLSI",
ACM (ed.);
(2021),
ISBN: 978-1-4503-8393-6;
147
- 154.
J. Maier, A. Steininger:
"Efficient Metastability Characterization for Schmitt-Triggers";
Talk: 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2019),
Hirosaki, Japan;
2019-05-12
- 2019-05-15; in: "2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)",
(2019),
ISBN: 978-1-5386-4747-9;
124
- 133.
J. Maier, A. Steininger:
"Online Test Vector Insertion: A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic";
Talk: 17th Symposium on Design and Diagnosis of Electronic Circuits and Systems (DDECS 2014),
Warschau, Polen;
2014-04-23
- 2014-04-25; in: "Design and Diagnostics of Electronic Circuits Systems (DDECS), 2014 IEEE 17th International Symposium on",
(2014),
6 pages.
A. Marchisio, B. Bussolino, A. Colucci, M. Hanif, M. Martina, G. Masera, M. Shafique:
"FasTrCaps: An Integrated Framework for Fast yet Accurate Training of Capsule Networks";
Talk: 2020 International Joint Conference on Neural Networks (IJCNN),
Glasgow, UK;
2020-07-19
- 2020-07-24; in: "Proceedings of 2020 International Joint Conference on Neural Networks (IJCNN)",
IEEE,
(2020),
ISBN: 978-1-7281-6926-2;
1
- 8.
A. Marchisio, B. Bussolino, A. Colucci, M. Martina, G. Masera, M. Shafique:
"Q-CapsNets: A Specialized Framework for Quantizing Capsule Networks";
Talk: 2020 57th ACM/IEEE Design Automation Conference (DAC),
San Fransisco, USA (Virtual);
2020-07-20
- 2020-07-24; in: "Proceedings of 2020 57th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2020),
ISSN: 0738-100x;
1
- 6.
A. Marchisio, M. Hanif, F. Khalid, G. Plastiras, C. Kyrkou, T. Theocharides, M. Shafique:
"Deep Learning for Edge Computing: Current Trends, Cross-Layer Optimizations, and Open Research Challenges";
Talk: 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI),
Miami, USA;
2019-07-15
- 2019-07-17; in: "Proceeding of 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'19)",
IEEE,
(2019),
ISBN: 978-1-7281-3391-1;
553
- 559.
A. Marchisio, M. Hanif, M. Martina, M. Shafique:
"PruNet: Class-Blind Pruning Method for Deep Neural Networks";
Poster: IEEE International Joint Conference on Neural Networks (IJCNN),
Rio de Janeiro, Brasil;
2018-07-08
- 2018-07-13; in: "2018 International Joint Conference on Neural Networks (IJCNN)",
(2018),
ISBN: 978-1-5090-6014-6;
1
- 8.
A. Marchisio, M. Hanif, M. Shafique:
"CapsAcc: An Efficient Hardware Accelerator for CapsuleNets with Data Reuse";
Talk: 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE'19),
Florence, Italy;
2019-03-25
- 2019-03-29; in: "Proceedings of 2019 IEEE/ACM Design, Automation and Test in Europe Conference (DATE)",
IEEE,
(2019),
ISBN: 978-3-9819263-2-3;
964
- 967.
A. Marchisio, A. Massa, V. Mrazek, B. Bussolino, M. Martina, M. Shafique:
"NASCaps: A Framework for Neural Architecture Search to Optimize the Accuracy and Hardware Efficiency of Convolutional Capsule Networks";
Talk: 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD),
Virtual Conference;
2020-11-02
- 2020-11-05; in: "Proceedings of 2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)",
IEEE,
(2020),
1
- 9.
A. Marchisio, V. Mrazek, M. Hanif, M. Shafique:
"ReD-CaNe: A Systematic Methodology for Resilience Analysis and Design of Capsule Networks under Approximations";
Talk: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Grenoble, France;
2020-03-09
- 2020-03-13; in: "Proceedings of 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)",
IEEE,
(2020),
ISBN: 978-3-9819263-4-7;
1205
- 1210.
A. Marchisio, G. Nanfa, F. Khalid, M. Hanif, M. Martina, M. Shafique:
"CapsAttacks: Robust and Imperceptible Adversarial Attacks on Capsule Networks";
Talk: ICML Workshop on Uncertainty and Robustness in Deep Learning (UDL) 2019,
Long Beach, USA;
2019-06-14; in: "Proceedings of Workshop on Uncertainty and Robustness in Deep Learning (UDL) 2019 at ICML'19",
(2019),
1
- 9.
A. Marchisio, G. Nanfa, F. Khalid, M. Hanif, M. Martina, M. Shafique:
"Is Spiking Secure? A Comparative Study on the Security Vulnerabilities of Spiking and Deep Neural Networks";
Talk: 2020 International Joint Conference on Neural Networks (IJCNN),
Glasgow, UK;
2020-07-19
- 2020-07-24; in: "Proceedings of 2020 International Joint Conference on Neural Networks (IJCNN)",
IEEE,
(2020),
ISBN: 978-1-7281-6926-2;
1
- 8.
A. Marchisio, G. Nanfa, M. Martina, M. Shafique:
"Security Vulnerabilities of Deep, Capsule and Spiking Neural Networks against Adversarial Attacks";
Talk: IEEE International Workshop on Robust and Trustworthy Machine Learning (RTML) 2019,
Washington DC, USA;
2019-11-14
- 2019-11-15; in: "Proceedings of IEEE International Workshop on Robust and Trustworthy Machine Learning (RTML) 2019",
(2019),
1
- 4.
A. Marchisio, G. Pira, M. Martina, G. Masera, M. Shafique:
"DVS-Attacks: Adversarial Attacks on Dynamic Vision Sensors for Spiking Neural Networks";
Talk: 2021 International Joint Conference on Neural Networks,
Virtual Conference;
2021-07-18
- 2021-07-22; in: "Proceedings of the 2021 International Joint Conference on Neural Networks",
(2021).
A. Marchisio, G. Pira, M. Martina, G. Masera, M. Shafique:
"R-SNN: An Analysis and Design Methodology for Robustifying Spiking Neural Networks against Adversarial Attacks through Noise Filters for Dynamic Vision Sensors";
Talk: 2021 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS),
Virtual Conference;
2021-09-27
- 2021-10-01; in: "Proceedings of the 2021 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS)",
(2021),
6315
- 6321.
A. Marchisio, R. Putra, M. Hanif, M. Shafique:
"HW/SW Co-Design and Co-Optimizations for Deep Learning";
Talk: Workshop on INTelligent Embedded Systems Architectures and Applications (INTESA), at the Embedded Systems Week (ESWeek),
Turin, Italy;
2018-09-30
- 2018-10-05; in: "Workshop on INTelligent Embedded Systems Architectures and Applications (INTESA), at the Embedded Systems Week (ESWeek)",
(2018),
ISBN: 978-1-4503-6598-7;
13
- 18.
R. Massa, A. Marchisio, M. Martina, M. Shafique:
"An Efficient Spiking Neural Network for Recognizing Gestures with a DVS Camera on the Loihi Neuromorphic Processor";
Talk: 2020 International Joint Conference on Neural Networks (IJCNN),
Glasgow, UK;
2020-07-19
- 2020-07-24; in: "Proceedings of 2020 International Joint Conference on Neural Networks (IJCNN)",
IEEE,
(2020),
ISBN: 978-1-7281-6926-2;
1
- 9.
P. Milbredt, M. Glass, M. Lukasiewycz, A. Steininger, J. Teich:
"Designing FlexRay-based Automotive Architectures: A Holistic OEM Approach";
Talk: Design, Automation & Test in Europe Conference & Exhibition (DATE 2012),
Dresden, Germany;
2012-03-12
- 2012-03-16; in: "Design, Automation & Test in Europe Conference & Exhibition (DATE 2012) Proceedings",
EDAA,
(2012),
ISBN: 978-3-9810801-8-6;
276
- 279.
P. Milbredt, M. Horauer, A. Steininger:
"An Investigation of the Clique Problem in Flex Ray";
Talk: SIES´2008 Third international symposium on industrial embedded systems,
Montpellier - La Grande Motte, France;
2008-08-11
- 2008-08-13; in: "International Symposium on Industrial Embedded Systems, 2008.",
(2008),
ISBN: 978-1-4244-1995-1;
200
- 207.
P. Milbredt, A. Steininger, M. Horauer:
"Automated Testing of FlexRay Clusters for System Inconsistencies in Automotive Networks";
Talk: IEEE International Workshop on Electronic Design, Test and Applications,
Hong-Kong;
2008-05-23
- 2008-05-25; in: "4th IEEE International Symposium on Electronic Design, Test and Applications, 2008. DELTA 2008.",
(2008),
ISBN: 978-0-7695-3110-6;
533
- 538.
H. Mohammed, J. Howell, S. R. Hasan, N. Guo, F. Khalid, O. Elkeelany:
"Hardware Trojan Based Security Issues in Home Area Network: a Testbed Setup";
Talk: Midwest Symposium on Circuits and Systems,
Windsor, Canada;
2018-08-05
- 2018-08-08; in: "International Midwest Symposium on Circuits and Systems",
IEEE,
Windsor, canada
(2018),
1
- 4.
M. Morid Ahmadi, F. Khalid, M. Shafique:
"Side-Channel Attacks on RISC-V Processors: Current Progress, Challenges, and Opportunities";
Talk: The Fifth International Conferenceon Cyber-Technologies and Cyber-Systems,
Nice, France;
2020-10-25
- 2020-10-29; in: "Proceedings of the Fifth International Conferenceon Cyber-Technologies and Cyber-Systems",
(2020),
ISBN: 978-1-61208-818-1;
1
- 6.
H. Moser, U. Schmid:
"Construction of a Fault-Tolerant Wireless Communication Topology Using Distributed Agreement";
Talk: Junior Scientist Conference,
Wien;
2006-04-19
- 2006-04-21; in: "Junior Scientiest Conferenve 2006",
(2006),
47
- 48.
H. Moser, U. Schmid:
"Optimal clock synchronization revisited: Upper and lower bounds in real-time systems";
Talk: International Conference On Principles Of Distributed Systems (OPODIS),
Bordeaux;
2006-12-12
- 2006-12-14; in: "Principles of Distributed Systems",
(2006),
94
- 109.
H. Moser, U. Schmid:
"Optimal Deterministic Remote Clock Estimation in Real-Time Systems";
Talk: 12th International Conference On Principles of Distributed Systems,
Luxor, Ägypten;
2008-12-15
- 2008-12-18; in: "Principles of Distributed Systems",
Lecture Notes in Computer Science / Springer Verlag,
Volume 5401
(2008),
ISBN: 978-3-540-92220-9;
363
- 387.
H. Moser, U. Schmid:
"Reconciling Fault-Tolerant Distributed Algorithms and Real-Time Computing";
Talk: Structural Information and Communication Complexity,
Gdansk;
2011-06-26
- 2011-06-29; in: "Proceedings 18th International Colloquium on Structural Information and Communication Complexity (SIROCCO'11)",
Springer Berlin / Heidelberg,
(2011),
ISBN: 978-3-642-22211-5;
42
- 53.
H. Moser, B. Thallner:
"Construction of a Fault-Tolerant Wireless Communication Topology Using Distributed Agreement";
Talk: Workshop on Dependability issues in wireless ad hoc networks and sensor networks (DIWANS),
Los Angeles;
2006-09-25; in: "DIWANS '06: Proceedings of the 2006 workshop on Dependability issues in wireless ad hoc networks and sensor networks",
(2006),
35
- 43.
H. Moser, B. Thallner:
"Reconciling Distributed Computing Models and Real-Time Systems";
Talk: IEEE Real-Time Systems Symposium,
Rio de Janiero;
2006-12-05
- 2006-12-08; in: "Proceedings of the 27th IEEE Real-Time Systems Symposium (RTSS'06)",
(2006),
73
- 76.
V. Mrazek, M. Hanif, Z. Vasicek, L. Sekanina, M. Shafique:
"autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components";
Talk: 2019 56th ACM/IEEE Design Automation Conference (DAC),
Las Vegas, USA;
2019-06-02
- 2019-06-06; in: "Proceedings of 2019 56th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2019),
ISBN: 978-1-4503-6725-7;
1
- 6.
V. Mrazek, Z. Vasicek, L. Sekanina, M. Hanif, M. Shafique:
"ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining";
Talk: 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD),
Westminster, USA;
2019-11-04
- 2019-11-07; in: "Proceeding of 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD'19)",
IEEE,
(2019),
ISBN: 978-1-7281-2350-9;
1
- 8.
R. Najvirt, M Függer, T. Nowak, U. Schmid, M. Hofbauer, K. Schweiger:
"Experimental Validation of a Faithful Binary Circuit Model";
Talk: Great Lakes Symposium on VLSI (GLSVLSI'15),
Pittsburgh, Pennsylvania, USA;
2015; in: "Proceedings of the 25th Edition on Great Lakes Symposium on VLSI (GLSVLSI'15)",
(2015),
ISBN: 978-1-4503-3474-7;
355
- 360.
R. Najvirt, S. Naqvi, A. Steininger:
"Classifying Virtual Channel Access Control Schemes for Asynchronous NoCs";
Talk: 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013),
Santa Monica, CA;
2013-05-19
- 2013-05-22; in: "Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on",
(2013),
ISSN: 1522-8681;
9 pages.
R. Najvirt, T. Polzer, F. Beck, A. Steininger:
"Containment of Metastable Voltages in FPGAs";
Talk: 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems,
Belgrad;
2015-04-22
- 2015-04-24; in: "18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems",
(2015),
6 pages.
R. Najvirt, T. Polzer, A. Steininger:
"Measuring Metastability with Free-Running Clocks";
Talk: 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017),
San Diego, California;
2017-05-21
- 2017-05-24; in: "Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017)",
IEEE Computer Society,
10662 Los Vaqueros Circle
(2017),
ISBN: 978-1-5386-2749-5;
Paper ID 37,
7 pages.
R. Najvirt, A. Steininger:
"A Pausible Clock with Crystal Oscillator Accuracy";
Talk: 22nd European Conference on Circuit Theory and Design,
Trondheium, Norwegen;
2015-08-24
- 2015-08-26; in: "22nd European Conference on Circuit Theory and Design",
(2015),
Paper ID 67,
4 pages.
R. Najvirt, A. Steininger:
"A Versatile and Reliable Glitch Filter for Clocks";
Talk: 25th International Workshop on Power and Timing Modeling, Optimization and Simulation,
Salvador, Brasilien;
2015-09-01
- 2015-09-04; in: "25th International Workshop on Power and Timing Modeling, Optimization and Simulation",
(2015),
8 pages.
R. Najvirt, A. Steininger:
"Equivalence of Clock Gating and Synchronization with Applicability to GALS Communication";
Talk: 24th International Workshop on Power and Timing Modeling, Optimization and Simulation,
Isles Balears, Spain;
2014-09-29
- 2014-10-01; in: "Proceedings of the 24th International Workshop on Power and Timing Modeling, Optimization and Simulation",
IEEE,
(2014),
ISBN: 978-1-4799-5412-4;
Paper ID 29,
8 pages.
R. Najvirt, A. Steininger:
"How to Synchronize a Pausible Clock to a Reference";
Talk: 21st IEEE International Symposium on Asynchronous Circuits and Systems,
Mountain View, CA;
2015-05-04
- 2015-05-06; in: "21st IEEE International Symposium on Asynchronous Circuits and Systems",
(2015),
8 pages.
R. Najvirt, V. S. Veeravalli, A. Steininger:
"Particle Strikes in C-Gates: Relevance of SET Shapes";
Talk: 2nd Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale,
Avignon;
2013-05-30
- 2013-05-31; in: "Proceedings of the MEDIAN Workshop 2013",
(2013),
4 pages.
S. Naqvi:
"An Asynchronous Router Architecture using Four-Phase Bundled Handshake Protocol";
Talk: ICCGI 2012 : The Seventh International Multi-Conference on Computing in the Global Information Technology,
Venice, Italy;
2012-06-24
- 2012-06-29; in: "Proc. of The Seventh International Multi-Conference on Computing in the Global Information Technology",
(2012),
ISBN: 978-1-61208-202-8;
6 pages.
S. Naqvi, J. Lechner, A. Steininger:
"Protection of Muller-Pipelines from Transient Faults";
Talk: 15th International Symposium & Exhibit on Quality Electronic Design,
Santa Clara, USA;
2014-03-10
- 2014-03-12; in: "Proceedings 15th International Symposium & Exhibit on Quality Electronic Design",
(2014),
ISBN: 978-1-4799-3946-6;
9 pages.
S. Naqvi, R. Najvirt, A. Steininger:
"A Multi-Credit Flow Control Scheme for Asynchronous NoCs";
Talk: 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems,
Karoly Vary, Czech Republic;
2013-04-08
- 2013-04-10; in: "Proc. 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems",
(2013),
6 pages.
S. Naqvi, A. Steininger:
"A Tree Arbiter Cell for High Speed Resource Sharing in Asynchronous Environments";
Talk: Design Automation &Test in Europe Conference and Exhibition 2014 (DATE 14),
Dresden, Deutschland;
2014-03-24
- 2014-03-28; in: "Proceedings Design Automation &Test in Europe",
(2014),
ISBN: 978-3-9815370-2-4;
6 pages.
S. Naqvi, A. Steininger, J. Lechner:
"An SET Tolerant Tree Arbiter Cell";
Talk: 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013),
Santa Monica, CA;
2013-05-19
- 2013-05-22; in: "Asynchronous Circuits and Systems (ASYNC), 2013 IEEE 19th International Symposium on",
(2013),
ISSN: 1522-8681;
9 pages.
S. Naqvi, V. S. Veeravalli, A. Steininger:
"Protecting an Asynchronous NoC against Transient Channel Faults";
Talk: DSD 2012 (Euromicro Conference on Digital System Design),
Cesme, Izmir, Turkey;
2012-09-05
- 2012-09-08; in: "Proc. of 15th Euromicro Conference on Digital System Design",
(2012),
8 pages.
M. Naseer, M. Minhas, F. Khalid, M. Hanif, O. Hasan, M. Shafique:
"FANNet: Formal Analysis of Noise Tolerance, Training Bias and Input Sensitivity in Neural Networks";
Talk: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE),
Grenoble, France;
2020-03-09
- 2020-03-13; in: "Proceedings of 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)",
IEEE,
(2020),
ISBN: 978-3-9819263-4-7;
666
- 669.
T. Nowak, M Függer, A. Kößler:
"On the Performance of a Retransmission-Based Synchronizer";
Talk: Structural Information and Communication Complexity,
Gdansk;
2011-06-26
- 2011-06-29; in: "Structural Information and Communication Complexity",
Springer Berlin / Heidelberg,
(2011),
ISBN: 978-3-642-22211-5;
234
- 245.
T. Nowak, U. Schmid, K. Winkler:
"Topological Characterization of Consensus under General Message Adversaries";
Talk: 38th ACM Symposium on Principles of Distributed Computing (PODC'19),
Toronto, Canada;
2019-07-27
- 2019-08-02; in: "PODC'19 Proceedings of the 2019 ACM Symposium on Principles of Distributed Computing",
ACM,
New York, NY, USA
(2019),
ISBN: 978-1-4503-6217-7;
218
- 227.
D. Öhlinger, J. Maier, M Függer, U. Schmid:
"The Involution Tool for Accurate Digital Timing and Power Analysis";
Talk: 2019 IEEE 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2019),
Rhodos;
2019-07-01
- 2019-07-03; in: "2019 IEEE 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2019)",
(2019),
ISBN: 978-1-7281-2103-1;
1
- 8.
R. Pallierer, M. Horauer, A. Steininger:
"Monitoring and Fault Injection of X-by-Wire Communication Networks";
Talk: Entwicklerforum Design & Elektronik: Drahtlose und drahtgebundene Netzwerke,
Wien;
2004-02-03; in: "Entwicklerforum Design & Elektronik: Drahtlose und drahtgebundene Netzwerke",
(2004).
T. Panhofer, W. Friesenbichler, M. Delvai:
"Fault Tolerant Four-State Logic by Using Self-Healing Cells";
Talk: 2008 IEEE International Conference on Computer Design,
Lake Tahoe, CA, USA;
2008-10-12
- 2008-10-15; in: "2008 IEEE International Conference on Computer Design",
IEEE,
(2008),
ISBN: 978-1-4244-2658-4;
6 pages.
A. Pathania, K. Khdr, M. Shafique, T. Mitra, J. Henkel:
"QoS-Aware Stochastic Power Management for Many-Cores";
Talk: 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC),
San Fransisco, USA;
2018-06-24
- 2018-06-28; in: "2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)",
(2018),
ISSN: 0738-100x;
1
- 6.
A. Pathania, K. Khdr, M. Shafique, T. Mitra, J. Henkel:
"Scalable Probabilistic Power Budgeting for Many-Cores";
Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17),
Lausanne, Switzerland;
2017-03-27
- 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)",
IEEE,
(2017),
ISSN: 1558-1101;
864
- 869.
A. Paverd, M. Völp, F. Brasser, M. Schunter, N. Asokan, A. Sadeghi, P. Esteves-Verissimo, A. Steininger, T. Holz:
"Sustainable Security & Safety: Challenges andOpportunities";
Talk: 4th International Workshop on Security and Dependability of Critical Embedded Real-Time Systems (CERTS 2019),
Stuttgart;
2019-07-09; in: "Proceedings 4th International Workshop on Security and Dependability of Critical Embedded Real-Time Systems (CERTS 2019)",
(2019),
ISBN: 978-3-95977-119-1;
13 pages.
A. Pavlogiannis, K. Chatterjee, U. Schmid, A. Kößler:
"A Framework for Automated Competitive Analysis of On-line Scheduling of Firm-Deadline Tasks";
Talk: 35th IEEE Real-Time Systems Symposium,
Rome;
2014-12-02
- 2014-12-05; in: "Proccedings IEEE Real-Time Systems Symposium (RTSS'14)",
(2014),
ISSN: 1052-8725;
118
- 127.
M. Perner, U. Schmid:
"Self-Stabilizing High-Speed Communication in Multi-Synchronous GALS Architectures";
Talk: 24th IEEE International Symposium on On-Line Testing And Robust System Design (IOLTS'18),
Platja D'Aro, Spain;
2018-07-02
- 2018-07-04; in: "Proceedings 24th IEEE International Symposium on On-Line Testing And Robust System Design (IOLTS'18)",
(2018),
157
- 164.
M. Perner, U. Schmid, C. Lenzen, M. Sigl:
"Byzantine Self-Stabilizing Clock Distribution with HEX: Implementation, Simulation, Clock Multiplication";
Talk: DEPEND 2013, The Sixth International Conference on Dependability,
Barcelona, Spain;
2013-08-25
- 2013-08-31; in: "Proceedings of the 6th IARA International Conference on Dependability (DEPEND'13)",
IARA,
(2013),
ISBN: 978-1-61208-301-8;
6
- 15.
D. Pfleger, U. Schmid:
"A Framework for Connectivity Monitoring in Wireless Sensor Networks";
Talk: 10th International Conference on Sensor Technlogies and Applications (SENSORCOMM'16),
Nice, France;
2016-07-24
- 2016-07-28; in: "Proceedings 10th International Conference on Sensor Technlogies and Applications (SENSORCOMM'16)",
IARIA XPS Press,
(2016),
ISBN: 978-1-61208-490-9;
40
- 48.
D. Pfleger, U. Schmid:
"On Knowledge and Communication Complexity in Distributed Systems";
Talk: 25th International Colloquium on Structural Information and Communication Complexity (SIROCCO 2018),
Ma'ale HaHamisha, Israel;
2018-06-18
- 2018-06-21; in: "Proceedings 25th International Colloquium on Structural Information and Communication Complexity (SIROCCO 2018)",
Springer International Publishing,
(2018),
ISSN: 0302-9743;
312
- 330.
T. Polzer, T. Handl, A. Steininger:
"A Metastability-Free Multi-synchronous Communication Scheme for SoCs";
Talk: SSS 2009 (Symposium on Stabilization, Safety, and Security of Distributed Systems),
Lyon, France;
2009-11-03
- 2009-11-06; in: "Stabilization, Safety, and Security of Distribiuted Systems",
Springer,
5873/2009
(2009),
ISBN: 978-3642051173;
578
- 592.
T. Polzer, F. Huemer, A. Steininger:
"A Programmable Delay Line for Metastability Characterization in FPGAs";
Talk: 24th Austrian Workshop on Microelectronics (Austrochip),
Villach;
2016-10-19; in: "Proceedings 24th Austrian Workshop on Microelectronics",
(2016),
6 pages.
T. Polzer, F. Huemer, A. Steininger:
"Measuring Metastability Using a Time-to-Digital Converter";
Talk: 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems,
Dresden;
2017-04-19
- 2017-04-21; in: "Proceedings 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems",
IEEE Service Center,
(2017),
ISBN: 978-1-5386-0471-7;
Paper ID 55,
6 pages.
T. Polzer, A. Steininger:
"A General Approach for Comparing Metastable Behavior of Digital CMOS Gates";
Talk: 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems,
Kosice, Slovakia;
2016-04-20
- 2016-04-22; in: "Proc 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems",
(2016),
ISBN: 978-1-5090-2467-4;
6 pages.
T. Polzer, A. Steininger:
"An Approach for Efficient Metastability Characterization of FPGAs through the Designer";
Talk: 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2013),
Santa Monica, CA;
2013-05-19
- 2013-05-22; in: "19th IEEE International Symposium on Asynchronous Circuits and Systems",
(2013),
ISSN: 1522-8681;
9 pages.
T. Polzer, A. Steininger:
"Digital Late-Transition Metastability Simulation Model";
Talk: 16th Euromicro Conference on Digital System Design (DSD 2013),
Santander;
2013-09-04
- 2013-09-06; in: "Proceedings of the 16th Euromicro Conference on Digital System Design",
(2013),
8 pages.
T. Polzer, A. Steininger:
"Enhanced Metastability Characterization based on AC Analysis";
Talk: 18th Euromicro Conference on Digital System Design,
Funchal, Portugal;
2015-08-26
- 2015-08-28; in: "18th Euromicro Conference on Digital System Design",
(2015),
9 pages.
T. Polzer, A. Steininger:
"Measuring the Distribution of Metastable Upsets over Time";
Talk: 18th Euromicro Conference on Digital System Design,
Funchal, Portugal;
2015-08-26
- 2015-08-28; in: "Measuring the Distribution of Metastable Upsets over Time",
(2015),
8 pages.
T. Polzer, A. Steininger:
"Metastability Characterization for Muller C-Elements";
Talk: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013),
Karlsruhe;
2013-09-09
- 2013-09-11; in: "23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013)",
(2013),
8 pages.
T. Polzer, A. Steininger:
"SET Propagation in Micropipelines";
Talk: 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013),
Karlsruhe;
2013-09-09
- 2013-09-11; in: "23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS2013)",
(2013),
8 pages.
T. Polzer, A. Steininger, J. Lechner:
"Muller C-Element Metastability Containment";
Talk: International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2012,
Newcastle upon Tyne;
2012-09-04
- 2012-09-06; in: "Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation",
Lecture Notes in Computer Science,
7606
(2013),
ISBN: 978-3-642-36156-2;
103
- 112.
B. Prabakaran, A. Jimenez, G. Martinez, M. Shafique:
"EMAP: A Cloud-Edge Hybrid Framework for EEG Monitoring and Cross-Correlation Based Real-time Anomaly Prediction";
Talk: 2020 57th ACM/IEEE Design Automation Conference (DAC),
San Fransisco, USA;
2020-07-20
- 2020-07-24; in: "Proceedings of 2020 57th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2020),
ISSN: 0738-100x;
1
- 6.
B. Prabakaran, V. Mrazek, Z. Vasicek, L. Sekanina, M. Shafique:
"ApproxFPGAs: Embracing ASIC-Based Approximate Arithmetic Components for FPGA-Based Systems";
Talk: 2020 57th ACM/IEEE Design Automation Conference (DAC),
San Fransisco, USA (Virtual);
2020-07-20
- 2020-07-24; in: "Proceedings of 2020 57th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2020),
ISSN: 0738-100x;
1
- 6.
B. Prabakaran, S. Rehman, M. Hanif, S. Ullah, G. Mazaheri, A. Kumar, M. Shafique:
"DeMAS: An Efficient Design Methodology for Building Approximate Adders for FPGA-Based Systems";
Poster: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18),
Dresden, Deutschland;
2018-03-19
- 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)",
(2018),
ISBN: 978-3-9819263-1-6;
917
- 920.
B. Prabakaran, S. Rehman, M. Shafique:
"XBioSiP: A Methodology for Approximate Bio-Signal Processing at the Edge";
Talk: 2019 56th ACM/IEEE Design Automation Conference (DAC),
Las Vegas, USA;
2019-06-02
- 2019-06-06; in: "Proceedings of 2019 56th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2019),
ISBN: 978-1-4503-6725-7;
1
- 6.
M. Proske, C. Trödhandl:
"Anytime, Everywhere - Approaches to Distance Labs in Embedded Systems Education";
Talk: ICTTA06: International Conference on Information & Communication Technologies,
Damascus;
2006-04-24
- 2006-04-28; in: "Proceedings of ICTTA 2006",
(2006),
6 pages.
M. Proske, C. Trödhandl, T. Handl:
"Distance Labs - Embedded Systems @home";
Talk: Edutainment 2006,
Zhejiang;
2006-04-14
- 2006-04-18; in: "Journal of Computational Information Systems",
(2006),
435
- 444.
R. Putra, M. Hanif, M. Shafique:
"DRMap: A Generic DRAM Data Mapping Policy for Energy-Efficient Processing of Convolutional Neural Networks";
Talk: 2020 57th ACM/IEEE Design Automation Conference (DAC),
San Fransisco, USA (Virtual);
2020-07-20
- 2020-07-24; in: "Proceedings of 2020 57th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2020),
ISSN: 0738-100x;
1
- 6.
R. Putra, M. Hanif, M. Shafique:
"ReSpawn: Energy-Efficient Fault-Tolerance for Spiking Neural Networks considering Unreliable Memories";
Talk: 2021 International Conference On Computer-Aided Design,
Virtual Conference;
2021-11-01
- 2021-11-05; in: "Proceedings of the 2021 International Conference On Computer-Aided Design",
(2021).
R. Putra, M. Hanif, M. Shafique:
"SparkXD: A Framework for Resilient and Energy-Efficient Spiking Neural Network Inference using Approximate DRAM";
Talk: 2021 58th ACM/IEEE Design Automation Conference (DAC),
San Francisco, California, USA;
2021-12-05
- 2021-12-09; in: "Proceedings of the 2021 58th ACM/IEEE Design Automation Conference (DAC)",
(2021),
379
- 384.
R. Putra, M. Shafique:
"Q-SpiNN: A Framework for Quantizing Spiking Neural Networks";
Talk: 2021 International Joint Conference on Neural Networks,
Virtual Conference;
2021-07-18
- 2021-07-22; in: "Proceedings of the 2021 International Joint Conference on Neural Networks",
(2021).
R. Putra, M. Shafique:
"SpikeDyn: A Framework for Energy-Efficient Spiking Neural Networks with Continual and Unsupervised Learning Capabilities in Dynamic Environments";
Talk: 2021 58th ACM/IEEE Design Automation Conference (DAC),
San Francisco, California, USA;
2021-12-05
- 2021-12-09; in: "Proceedings of the 2021 58th ACM/IEEE Design Automation Conference (DAC)",
(2021),
1057
- 1062.
B. Rahbaran, M Függer, A. Steininger:
"Embedded Real-Time-Tracer --An Approach with IDE";
Talk: Workshop on Intelligent Solutions in Embedded Systems,
Austria, Graz;
2004-06-25; in: "Proceedings of the Second Workshop on Intelligent Solutions in Embedded Systems",
(2004),
ISBN: 3-902463-00-7;
25
- 35.
B. Rahbaran, A. Steininger:
"Real-time Fault Injection with Signal-Flip model by FIDYCO";
Talk: IEEE International Conference on Dependable Systems and Networks,
Florence, Italy;
2004-06-28
- 2004-07-01; in: "DSN 2004 Supplement",
IEEE Computer Society,
Supplemental
(2004),
70
- 71.
B. Rahbaran, A. Steininger, T. Handl:
"Built-in Fault Injection in Hardware-- The FIDYCO Example";
Talk: IEEE International Workshop on Electronic Design, Test and Applications,
Perth, Australia;
2004-01-28
- 2004-01-30; in: "Second IEEE International Workshop on Electronic Design, Test and Applications",
B. Rahbaran, A. Steininger (ed.);
IEEE Computer Society Press,
Delta 2004, Perth Australia
(2004),
ISBN: 0-7695-2081-2;
327
- 332.
D. Ratasich, O. Höftberger, H. Isakovic, M. Shafique, R. Grosu:
"A Self-Healing Framework for Building Resilient Cyber-Physical Systems";
Talk: 20th IEEE International Symposium on Real-Time Computing (ISORC 2017),
Toronto, Canada;
2017-05-16
- 2017-05-18; in: "Real-Time Distributed Computing (ISORC), 2017 IEEE 20th International Symposium on",
IEEE,
(2017),
ISBN: 978-1-5386-1574-4;
133
- 140.
V. Rathore, V. Chaturvedi, A. K. Singh, T. Srikanthan, R. R., S.-K. Lam, M. Shafique:
"HiMap: A Hierarchical Mapping Approach for Enhancing Lifetime Reliability of Dark Silicon Manycore Systems";
Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18),
Dresden, Deutschland;
2018-03-19
- 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)",
(2018),
ISBN: 978-3-9819263-1-6;
991
- 996.
V. Rathore, V. Chaturvedi, A. K. Singh, T. Srikanthan, M. Shafique:
"Life Guard: A Reinforcement Learning-Based Task Mapping Strategy for Performance-Centric Aging Managemen";
Talk: 2019 56th ACM/IEEE Design Automation Conference (DAC),
Las Vegas, USA;
2019-06-02
- 2019-06-06; in: "Proceedings of 2019 56th ACM/IEEE Design Automation Conference (DAC)",
IEEE,
(2019),
ISBN: 978-1-4503-6725-7;
1
- 6.
V. Rathore, V. Chaturvedi, A. K. Singh, T. Srikanthan, M. Shafique:
"Towards Scalable Lifetime Reliability Management for Dark Silicon Manycore Systems";
Talk: 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Rhodes, Greece;
2019-07-01
- 2019-07-03; in: "Proceeding of 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS'19)",
IEEE,
(2019),
ISBN: 978-1-7281-2490-2;
204
- 207.
S. Rehman, W. El-Harouni, M. Shafique, A. Kumar, J. Henkel:
"Architectural-Space Exploration of Approximate Multipliers";
Talk: The IEEE/ACM International Conference on Computer-Aided Design (ICCAD),
Austin, TX, USA;
2016-11-07
- 2016-11-10; in: "ICCAD",
ACM New York, NY, USA,
(2016),
ISBN: 978-1-4503-4466-1.
S. Rehman, F. Kriebel, B. Prabakaran, F. Khalid, M. Shafique:
"Hardware and Software Techniques for Heterogeneous Fault-Tolerance";
Talk: 2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design (IOLTS),
Platja d'Aro, Spain;
2018-07-02
- 2018-07-04; in: "2018 IEEE 24th International Symposium on On-Line Testing and Robust System Design (IOLTS)",
(2018),
ISBN: 978-1-5386-5992-2;
115
- 118.
T. Reinbacher, J. Brauer:
"Precise control flow reconstruction using boolean logic";
Talk: EMSOFT2011, ACM international conference on Embedded software,
Taipei;
2011-10-09
- 2011-10-14; in: "EMSOFT '11 Proceedings of the ninth ACM international conference on Embedded software",
ACM New York,
(2011),
ISBN: 978-1-4503-0714-7;
117
- 126.
T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski:
"Past time LTL runtime verification for microcontroller binary code";
Talk: FMICS 2011,
Trento;
2011-08-29
- 2011-08-30; in: "Formal Methods for Industrial Critical Systems",
Springer Berlin / Heidelberg,
(2011),
ISBN: 978-3-642-24430-8;
37
- 51.
T. Reinbacher, J. Brauer, M. Horauer, A. Steininger, S. Kowalewski:
"Test-Case Generation for Embedded Binary Code Using Abstract Interpretation";
Talk: MEMICS 2010 (Mathematical and Engineering Methods in Computer Science),
Mikulov, Czech Republic;
2010-10-22
- 2010-10-24; in: "MEMICS proceedings",
(2010),
151
- 158.
T. Reinbacher, J. Brauer, D. Schachinger, A. Steininger, S. Kowalewski:
"Automated test-trace inspection for microcontroller binary code";
Talk: 2nd International Conference on Runtime Verification (RV 2011),
San Francisco;
2011-09-27
- 2011-09-30; in: "Runtime Verification",
(2011),
239
- 244.
T. Reinbacher, M Függer, J. Brauer:
"Real-Time Runtime Verification on Chip";
Talk: RV 2012: the 3rd International Conference on Runtime Verification,
Istanbul;
2012-09-25
- 2012-09-28; in: "Proc. of RV 2012: the 3rd International Conference on Runtime Verification",
LNCS / Springer,
7687
(2012).
T. Reinbacher, J. Geist, P. Moosbrugger, M. Horauer, A. Steininger:
"Parallel Runtime Verification of Temporal Properties for Embedded Software";
Talk: Mechatronics and Embedded Systems and Applications (MESA), 2012 IEEE/ASME International Conference on,
Suzhou, China;
2012-07-08
- 2012-07-10; in: "Mechatronics and Embedded Systems and Applications (MESA), 2012 IEEE/ASME International Conference on",
(2012),
ISBN: 978-1-4673-2347-5;
224
- 231.
T. Reinbacher, D. Gückel, M. Horauer:
"Testing microcontroller software simulators";
Talk: WS4C 2011,
Berlin;
2011-10-04
- 2011-10-07; in: "Workshop on Software Language Engineering for Cyber-physical Systems",
(2011).
T. Reinbacher, M. Horauer, A. Steininger:
"A Runtime Verification Unit for Microcontrollers";
Talk: System, Software, SoC and Silicon Debug Conference (S4D), 2012,
Vienna, Austria;
2012-09-19
- 2012-09-20; in: "System, Software, SoC and Silicon Debug Conference (S4D), 2012",
(2012),
ISSN: 2114-3684;
1
- 6.
T. Reinbacher, A. Steininger, T. Müller, M. Horauer, J. Brauer, S. Kowalewski:
"Hardware support for efficient testing of embedded software";
Talk: The 7th ASME/IEEE International Conference on Mechatronic and Embedded Systems and Applications,
Washington;
2011-08-29
- 2011-08-31; in: "International Conference on Mechatronic and Embedded Systems and Applications",
ASME,
(2011).
S. Resch, A. Steininger, C. Scherrer:
"Software Composability and Mixed Criticality for Triple Modular Redundant Architectures";
Talk: SASSUR Workshop 2013,
Toulouse;
2013-09-24; in: "Proceedings of the 2013 SASSUR Workshop",
(2013),
4 pages.
H. Rincon Galeana, K. Winkler, U. Schmid, S. Rajsbaum:
"A Topological View of Partitioning Arguments: Reducing k-Set Agreement to Consensus";
Talk: 21st International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2019),
Pisa, Italy;
2019-10-22
- 2019-10-25; in: "Stabilization, Safety, and Security of Distributed Systems",
Lecture Notes in Computer Science / Springer,
vol 11914 / Cham
(2019),
ISSN: 0302-9743;
307
- 322.
P. Robinson, M. Biely, U. Schmid:
"Brief Announcment: Weak Synchrony Models and Failure Detectors for Message Passing (k-)Set Agreement*";
Talk: DISC 2009 (International Symposium on Distributed Computing),
Elche, Spain;
2009-09-23
- 2009-09-25; in: "Distribiuted Computing",
Springer,
5805/2009
(2009),
ISBN: 978-3-642-04354-3;
360
- 361.
P. Robinson, U. Schmid:
"The Asynchronous Bounded Cycle Model";
Talk: 10 International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2008),
Detroit, USA;
2008-11-21
- 2008-11-23; in: "Stabilization, Safety, and Security of Distributed Systems",
Lecture Notes in Conputer Science / Springer Verlag,
5340
(2008),
ISSN: 0302-9743;
246
- 262.
C. Scherrer, A. Steininger:
"How does Resource Utilization Affect Fault Tolerance?";
Talk: International Symp. on Defect and Fault Tolerance in VLSI-Systems,
Mt. Fuji, Yamanashi, Japan;
2000-10-02
- 2000-10-06; in: "PROCEEDINGS",
(2000),
418
- 425.
C. Scherrer, A. Steininger:
"Periodic Node Shutdown in a Fail-Silent Architecture - Risk or Rescue?";
Poster: World Multiconference on Systemics, cybernetics and Informatics,
Orlando, Florida, USA;
2000-07-14
- 2000-07-18; in: "PROCEEDINGS",
(2000),
205
- 210.
T. Schlögl, U. Schmid, R. Kuznets:
"The Persistence of False Memory: Brain in a Vat despite Perfect Clocks";
Talk: PRIMA 2020,
Japan;
2020-11-18
- 2020-11-20; in: "PRIMA 2020: Principles and Practice of Multi-Agent Systems",
Springer Nature Switzerland AG,
(2020),
ISBN: 978-3-030-69322-0;
403
- 411.
U. Schmid:
"A Perspective of Fault-Tolerant Clock Synchronization";
Keynote Lecture: 2007 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication,
Wien (invited);
2007-10-01
- 2007-10-03; in: "IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication",
(2007).
U. Schmid:
"Distributed Algorithms and VLSI";
Keynote Lecture: 10 International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2008),
Detroit, USA (invited);
2008-11-21
- 2008-11-23; in: "Stabilization, Safety, and Security of Distributed Systems",
Lecture Notes in Conputer Science / Springer Verlag,
5340
(2008),
ISSN: 0302-9743;
3.
U. Schmid:
"Synchrony and Time in Fault-Tolerant Distribiuted Algorithms";
Talk: FORMATS 2010 (Formal Modeling and Analysis of Times Systems),
Klosterneuburg, Austria (invited);
2010-09-08
- 2010-09-10; in: "Formal Modeling and Analysis of Timed Systems",
Springer,
6246
(2010),
ISBN: 9783642152962.
U. Schmid, C. Fetzer:
"Randomized asynchronous consensus with imperfect communications.";
Talk: IEEE Symposium on Reliable Distributed Systems,
Florence, Italy;
2003-10-06
- 2003-10-08; in: "Proc. 22nd Symposium on Reliable Distributed Systems ",
(2003),
361
- 370.
U. Schmid, P. Robinson:
"Brief Announcement: The Asynchronous Bounded Cycle Model";
Talk: ACM Symposium on Principles of Distributed Computing,
Toronto, Canada;
2008-08-18
- 2008-08-21; in: "PODC'08 Proceedings of the 27th Annual ACM Symposium on Principles of Distributed Computing",
Association for Computing Machinery (ACM),
(2008),
ISBN: 978-1-59593-989-0;
423.
U. Schmid, M. Schwarz, K. Winkler:
"On the Strongest Message Adversary for Consensus in Directed Dynamic Networks";
Talk: 25th International Colloquium on Structural Information and Communication Complexity (SIROCCO 2018),
Ma'ale HaHamisha, Israel;
2018-06-18
- 2018-06-21; in: "Structural Information and Communication Complexity",
Springer International Publishing,
(2018),
ISSN: 0302-9743;
102
- 120.
U. Schmid, A. Steininger, H. Veith:
"Towards a Systematic Design of Fault-Tolerant Asynchronous Circuits";
Poster: GMM/GI/ITG-Fachtagung Zuverlässigkeit und Entwurf,
München;
2007-03-26
- 2007-03-28; in: "Fachtagung Zuverlässigkeit und Entwurf",
VDE Verlag,
(2007),
ISBN: 978-3-8007-3023-0;
173
- 174.
M. Schöberl:
"Design and Implementation of an Efficient Stack Machine";
Talk: International Parallel and Distributed Processing Symposium (IPDPS),
Denver, Colorado;
2005-04-04
- 2005-04-08; in: "Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International (IPDPS)",
(2005),
ISBN: 0-7695-2312-9;
159.
M. Schöberl:
"Using a Java Optimized Processor in a Real World Application";
Talk: Workshop on Intelligent Solutions in Embedded Systems,
Vienna, Austria;
2003-06-27; in: "Proceedings of the First Workshop on Intelligent Solutions in Embedded Systems",
W. Elmenreich (ed.);
(2003),
165
- 176.
M. Schütz, F. Huemer, A. Steininger:
"A Practical Comparison of 2-Phase Delay Insensitve Communication Protocols";
Talk: Austrochip Workshop on Microelectronics,
Wien;
2015-09-28; in: "Austrochip Workshop on Microelectronics",
(2015),
6 pages.
M. Schwarz, U. Schmid:
"Round-Oblivious Stabilizing Consensus in Dynamic Networks";
Talk: 23rd International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2021),
virtuell (invited);
2021-11-17
- 2021-11-20; in: "Proceedings 23rd International Symposium on Stabilization, Safety, and Security of Distributed Systems (SSS 2023)",
Springer,
LNCS 13046
(2021),
ISBN: 978-3-030-91080-8;
154
- 172.
M. Schwarz, K. Winkler, U. Schmid:
"Fast Consensus Under Eventually Stabilizing Message Adversaries";
Talk: 17th International Conference on Distributed Computing and Networking,
Singapore;
2016-01-04
- 2016-01-07; in: "Proceedings of the 17th International Conference on Distributed Computing and Networking",
ACM,
(2016),
ISBN: 978-1-4503-4032-8;
1
- 10.
M. Schwarz, K. Winkler, U. Schmid, M. Biely, P. Robinson:
"Brief Announcement: Gracefully Degrading Consensus and k-Set Agreement under Dynamic Link Failures";
Talk: 33th ACM SIGACTSIGOPS Symposium on Principles of Distributed Computing (PODC),
Paris, France;
2014-07-15
- 2014-07-18; in: "Proceedings of the 33th ACM SIGACTSIGOPS Symposium on Principles of Distributed Computing",
ACM,
(2014),
341
- 343.
P. Selvo, M. Masera, R. Peloso, G. Masera, M. Shafique, M. Martina:
"An Optimized Partial-Distortion-Elimination Based Sum-of-Absolute-Differences Architecture for High-Efficiency-Video-Coding";
Talk: The 6th Conference on Applications in Electronics Pervading Industry, Environment and Society (ApplePies),
Pisa, Italy;
2018-09-26
- 2018-09-27; in: "The 6th Conference on Applications in Electronics Pervading Industry, Environment and Society (ApplePies)",
(2018),
1
- 6.
M. Shafique, R. Hafiz, M. Javed, S. Abbas, L. Sekanina, Z. Vasicek, V. Mrazek:
"Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap";
Talk: 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17),
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17);
2017-07-03
- 2017-07-05; in: "Proceedings of 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI'17)",
IEEE,
(2017),
ISSN: 2159-3477;
617
- 632.
M. Shafique, F. Khalid, S. Rehman:
"Intelligent Security Measures for Smart Cyber Physical Systems";
Talk: 2018 21st Euromicro Conference on Digital System Design (DSD),
Prague, Czech Republic;
2018-08-29
- 2018-08-31; in: "2018 21st Euromicro Conference on Digital System Design (DSD)",
(2018),
ISBN: 978-1-5386-7376-8;
280
- 287.
M. Shafique, A. Marchisio, R. Putra, M. Hanif:
"Towards Energy-Efficient and Secure Edge AI: A Cross-Layer Framework";
Talk: 2021 International Conference On Computer-Aided Design,
Virtual Conference (invited);
2021-11-01
- 2021-11-05; in: "Proceedings of the 2021 International Conference On Computer-Aided Design",
(2021).
M. Shafique, T. Theocharides, C.-S. Bouganis, M. Hanif, F. Khalid, R. Hafiz, S. Rehman:
"An Overview of Next-Generation Architectures for Machine Learning: Roadmap, Opportunities and Challenges in the IoT Era";
Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18),
Dresden, Deutschland;
2018-03-19
- 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference (DATE)",
(2018),
ISBN: 978-3-9819263-1-6;
827
- 832.
A. Steininger:
"Embedded Systems im Auto - Ein Vorbild für die Bahn?";
Talk: Tagung,
TU-Wien, Prechtlsaal;
2004-03-11; in: "Intelligenz im Schienenverkehr: Sicherheitsstandarts und effiziente Kapatzitätsnutzung",
(2004),
#.
A. Steininger:
"Error Containment in the Presence of Metastability";
Talk: Dagstuhl Seminar 08371 : Fault-Tolerant Distributed Algorithms on VLSI Chips,
Dagstuhl, Germany (invited);
2009-09-07
- 2009-09-10; in: "Fault-Tolerant Distributed Algorithms on VLSI Chips",
Leibniz Zentrum Informatik,
08371
(2009),
ISSN: 1862-4405;
?.
A. Steininger, M Függer, U. Schmid, G. Fuchs:
"Fault-Tolerant Algorithms on SoCs - A case study";
Talk: IEEE International Conference on Dependable Systems and Networks,
Philadelphia;
2006-06-25
- 2006-06-28; in: "Supplement Proceedings of the 2006 International Conference on Dependable Systems and Networks (DSN)",
(2006),
190
- 191.
A. Steininger, T. Handl, G. Fuchs, F. Zangerl:
"Testing the Hardware Implementation of a Distributed Clock Generation Algorithm for SoCs";
Talk: East-West Design & Test International Workshop (EWDTW'06),
Sochi (invited);
2006-09-15
- 2006-09-19; in: "East-West Design & Test International Workshop",
(2006),
59
- 64.
A. Steininger, T. Kottke:
"A Fail-Silent Memory for Automotive Applications";
Talk: European Test Symposium,
Ajaccio,Corsica,France;
2004-05-23
- 2004-05-26; in: "9th European Test Symposium",
(2004),
253
- 258.
A. Steininger, T. Kottke:
"Concurrent Checking eines Adressdecoders";
Talk: 16. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen,
Dresden, Germany;
2004-02-29
- 2004-03-02; in: "GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen",
(2004),
25
- 29.
A. Steininger, T. Kottke:
"Ein dynamisch rekonfigurierbarer superskalarer Prozessor mit den Modi Sicherheit und Performanz";
Talk: 18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen,
Titisee;
2006-03-12
- 2006-03-14; in: "18. ITG/GI/GMM Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen",
(2006),
36
- 40.
A. Steininger, J. Maier, R. Najvirt:
"The Metastable Behavior of a Schmitt-Trigger";
Talk: 22nd IEEE International Symposium on Asynchronous Circuits and Systems,
Porto Alegre -- Brazil;
2016-05-08
- 2016-05-11; in: "2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)",
IEEE Computer Society Conference Publishing Services (CPS),
(2016),
ISBN: 978-1-4673-9007-1;
57
- 64.
A. Steininger, R. Najvirt, J. Maier:
"Does Cascading Schmitt-Trigger Stages Improve the Metastable Behavior?";
Talk: 2016 Euromicro Conference on Digital System Design (DSD),
Limassol, Portugal;
2016-08-31
- 2016-09-02; in: "2016 Euromicro Conference on Digital System Design (DSD)",
IEEE,
(2016),
ISBN: 978-1-5090-2817-7;
372
- 379.
A. Steininger, B. Rahbaran, T. Handl:
"Built-in Fault Injectors - The Logical Continuation of BIST?";
Talk: Workshop on Intelligent Solutions in Embedded Systems (WISES'03),
Wien;
2003-06-27; in: "Proceeding of the First Workshop on Intelligent Solutions in Embedded Systems",
(2003),
187
- 196.
A. Steininger, C. Scherrer:
"How To Tune the MTTF of a Fault-Tolerant System";
Talk: International Symp. on Defect and Fault Tolerance in VLSI-Systems,
San Francisco, California, USA;
2001-10-02
- 2001-10-06; in: "PROCEEDINGS",
(2001),
251
- 256.
A. Steininger, M. Schwendinger:
"A Systematic Approach to Clock Failure Detection";
Talk: Austrochip Workshop on Microelectronics,
Wien;
2019-10-24; in: "2019 Austrochip Workshop on Microelectronics (Austrochip)",
(2019),
ISBN: 978-1-7281-1953-3;
35
- 42.
A. Steininger, V. S. Veeravalli, D. Alexandrescu, E. Costenaro, L. Anghel:
"Exploring the State Dependent SET Sensitivity of Asynchronous Logic - The Muller-Pipeline Example";
Talk: 2014 32nd IEEE International Conference on Computer Design (ICCD),
Seoul, Korea;
2014-10-19
- 2014-10-22; in: "Proceedings of the 2014 32nd IEEE International Conference on Computer Design (ICCD)",
IEEE,
(2014),
ISBN: 978-1-4799-6492-5;
Paper ID 69,
7 pages.
A. Steininger, J. Vilanek:
"Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example";
Talk: IEEE INTERNATIONAL CONFERENCE ON COMPUTER Design: VLSI in Computers & Processors,
Freiburg, Germany;
2002-09-16
- 2002-09-18; in: "Computer Design: VLSI in Computers & Processors",
(2002),
277
- 280.
H. Stratil:
"An efficient implementation of the greedy forwarding strategy";
Talk: 34. Jahrestagung der Gesellschaft für Informatik (GI),
Ulm;
2004-09-20
- 2004-09-24; in: "GI-Edition Informatik 2004- Informatik verbindet",
Köllen Druck+Verlag,
Band 2, Ulm
(2004),
ISSN: 1617-5468;
365
- 369.
H. Stratil:
"Distributed Construction of an Underlay in Wireless Networks";
Talk: European Workshop on Wireless Sensor Networks,
Istanbul, Türkei;
2005-01-31
- 2005-02-02; in: "Proceedings of the Second European Workshop on Wireless Sensor Networks",
(2005),
176
- 187.
H. Stratil:
"Fault Tolerant Topology Control with unreliable Failure Detectors";
Talk: IASTED International Conference on Parallel and Distributed Computing Systems,
Phoenix, Arizona;
2005-11-14
- 2005-11-16; in: "Proceedings of the 17th IASTED International Conference on Parallel and Distributed Computing and Systems",
(2005),
ISBN: 0-88986-525-6;
767
- 772.
H. Stratil:
"Voronoi supported communication in Wireless ad-hoc Networks";
Talk: Second International Symposium on Voronoi Diagrams in Science and Engineering,
Seoul, Korea;
2005-10-10
- 2005-10-13; in: "The 2nd International Symposium on Voronoi Diagrams in Science and Engineering",
(2005),
105
- 116.
H. Stratil, U. Schmid:
"Efficient Position-based Communication in Wireless Ad-hoc Networks";
Poster: Junior Scientist Conference,
Wien;
2006-04-19
- 2006-04-21; in: "Junior Scientist Conference 2006",
(2006),
75
- 76.
A. Subramaniyan, S. Rehman, M. Shafique, A. Kumar, J. Henkel:
"Soft Error-Aware Architectural Exploration for Designing Reliability Adaptive Cache Hierarchies in Multi-Cores";
Talk: 2017 IEEE/ACM 20th Design, Automation and Test in Europe Conference (DATE'17),
Lausanne, Switzerland;
2017-03-27
- 2017-03-31; in: "Proceedings of the 2017 Design, Automation & Test in Europe (DATE)",
IEEE,
(2017),
ISSN: 1558-1101;
37
- 42.
Z. Tabassam, P. Behal, R. Najvirt, A. Steininger:
"Input/Output-Interlocking for Fault Mitigation in QDI Pipelines";
Talk: 29th Austrian Workshop on Microelectronics,
Linz;
2021-10-14; in: "Proceedings 29th Austrian Workshop on Microelectronics",
(2021),
ISBN: 978-1-6654-3661-8;
4 pages.
G. Tarawneh, M Függer, C. Lenzen:
"Metastability tolerant computing";
Talk: 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017),
San Diego, California;
2017-05-21
- 2017-05-24; in: "Proceedings 2017 23rd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2017)",
IEEE Computer Society,
10662 Los Vaqueros Circle
(2017),
ISBN: 978-1-5386-2749-5;
25
- 32.
S. Tauner, M. Telesklav:
"Comparative Analysis and Enhancement of CFG-based Hardware-Assisted CFI Schemes";
Talk: 2021 International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES 2021),
Virtual;
2021-10-08
- 2021-10-15; in: "ACM Transactions on Embedded Computing Systems",
Association for Computing Machinery,
(2021),
ISBN: 978-1-4503-8378-3.
M. T. Teimoori, M. Hanif, A. Ejlali, M. Shafique:
"AdAM: Adaptive Approximation Management for the Non-Volatile Memory Hierarchies";
Talk: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE'18),
Dresden, Deutschland;
2018-03-19
- 2018-03-23; in: "IEEE/ACM 21st Design, Automation and Test in Europe Conference & Exhibition (DATE)",
(2018),
ISBN: 978-3-9819263-1-6;
785
- 790.
K. Thaller:
"A highly-efficient transparent online memory test";
Talk: Test Conference,
Baltimore, MD, USA;
2001-10-30
- 2001-11-01; in: "Proceedings",
(2001),
230
- 239.
B. Thallner:
"Fault Tolerant Communication Topologies for Wireless Ad Hoc Networks";
Talk: IEEE International Conference on Dependable Systems and Networks,
Florence, Italy;
2004-06-28
- 2004-07-01; in: "Proceedings 1st Workshop on Dependability Issues in Wireless Ad Hoc Networks and Sensor Networks (DIWANS'04)",
(2004),
261
- 266.
B. Thallner, H. Moser:
"Topology Control for Fault-Tolerant Communication in Highly Dynamic Wireless Networks";
Talk: Workshop on Intelligent Solutions in Embedded Systems,
Hamburg, Deutschland;
2005-05-20; in: "Proceedings of the Third International Workshop on Intelligent Solutions in Embedded Systems",
(2005),
89
- 100.
C. Trödhandl, M. Proske, W. Elmenreich:
"Remote Target Monitoring in Embedded Systems Lab Courses using a Sensor Network";
Talk: The 32nd Annual Conference of the IEEE Industrial Society,
Paris;
2006-11-06
- 2006-11-10; in: "The 32nd Annual Conference of the IEEE Industrial Society - IECON'2006",
(2006),
5433
- 5438.
C. Trödhandl, B. Weiss:
"A Concept for Hybrid Fault Injection in Distributed Systems";
Talk: Testing: Academic and Industrial Conference --- Practice and Research Techniques,
Windsor, United Kingdom;
2008-08-29
- 2008-08-31; in: "Testing: Academic and Industrial Conference --- Practice and Research Techniques (Fast Abstracts)",
(2008).
C. Trödhandl, B. Weiss, T. Handl, M. Proske:
"Environments for Remote Teaching in Embedded Systems Courses";
Talk: ERCIM / DECOS Workshop on Dependable Embedded Systems,
Cavtat (invited);
2006-09-29; in: "2006 ERCIM / DECOS Workshop on Dependable Embedded Systems",
(2006).
P Tummeltshammer, J.C Hoe, M Püschel:
"Multiple Constant Multiplication By Time-Multiplexed Mapping of Addition Chains";
Talk: DAC 04,
San Diego, California, USA;
2004-06-07
- 2004-06-11; in: "DAC 04",
(2004),
826
- 829.
P Tummeltshammer, A. Steininger:
"On the Risk of Fault Coupling over the Chip Substrate";
Talk: DSD 2009 (Euromicro Conference on Digital System Design),
Patras, Greece;
2009-08-27
- 2009-08-29; in: "12th EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - Architectures, Methods and Tools - DSD2009",
IEEE Computer Society,
(2009),
ISBN: 9780769537825;
325
- 332.
P Tummeltshammer, A. Steininger:
"On the Role of the Power Supply as an Entry for Common Cause Faults - An Experimental Analysis";
Talk: DDECS 2009 (Design and Diagnostics of Electronic Circuits and Systems),
Liberec, Czech Republic;
2009-04-15
- 2009-04-17; in: "2009 IEEE Design and Diagnostics of Electronic Circuits and Systems",
IEEE,
00
(2009),
ISBN: 9781424433414;
152
- 157.
P Tummeltshammer, A. Steininger:
"Power Supply Induced Common Cause Faults - Experimental Assessment of Potential Countermeasures";
Talk: DSN 2009 (International Conference on Dependable Systems and Networks),
Estoril, Portugal;
2009-06-29
- 2009-07-02; in: "DSN 2009 - Full Program",
Springer,
(2009),
ISBN: 9781424444212;
449
- 457.
P Tummeltshammer, A. Steininger:
"Time-Multiplexed Multiple Constant Multiplication";
Talk: Junior Scientist Conference,
Wien;
2006-04-19
- 2006-04-21; in: "Junior Scientist Conference 2006",
(2006),
77
- 78.
S. Ullah, S. Rehman, B. Prabakaran, F. Kriebel, M. Hanif, M. Shafique, A. Kumar:
"Area-Optimized Low-Latency Approximate Multipliers for FPGA-based Hardware Accelerators";
Talk: 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC),
San Fransisco, USA;
2018-06-24
- 2018-06-28; in: "2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)",
(2018),
ISSN: 0738-100x;
1
- 6.
I. van der Giessen, R. Jalali, R. Kuznets:
"Uniform Interpolation via Nested Sequents";
Talk: The 27th International Workshop, WoLLIC 2021,
online;
2021-10-05
- 2021-10-08; in: "Logic, Language, Information, and Computation 27th International Workshop, WoLLIC 2021, Virtual Event, October 5-8, 2021, Proceedings",
Lecture Notes in Computer Science,
13038
(2021),
ISSN: 0302-9743;
337
- 354.
V. S. Veeravalli, A. Steininger:
"Architecture for Monitoring SET Propagation in 16-bit Sklansky Adder";
Poster: 15th International Symposium & Exhibit on Quality Electronic Design,
Santa Clara, USA;
2014-03-10
- 2014-03-12; in: "Proceedings 15th International Symposium & Exhibit on Quality Electronic Design",
(2014),
ISBN: 978-1-4799-3946-6;
8 pages.
V. S. Veeravalli, A. Steininger:
"Can we trust SET Injection Models?";
Talk: MEDIAN Finale Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale,
Tallinn, Estonia;
2015-11-10
- 2015-11-11; in: "MEDIAN Finale Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale",
(2015),
6 pages.
V. S. Veeravalli, A. Steininger:
"Design and Physical Implementation of a Target ASIC for SET Experiments";
Poster: 2016 Euromicro Conference on Digital System Design (DSD),
Limassol, Portugal;
2016-08-31
- 2016-09-02; in: "Proc. 2016 Euromicro Conference on Digital System Design (DSD)",
IEEE,
(2016),
ISBN: 978-1-5090-2817-7;
694
- 697.
V. S. Veeravalli, A. Steininger:
"Diagnosis of SET Propagation in Combinational Logic under Dynamic Operation";
Poster: 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10),
Stanford University, USA;
2014-04-01
- 2014-04-02; in: "Proceedings 2014 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 10)",
(2014),
6 pages.
V. S. Veeravalli, A. Steininger:
"Efficient Radiation-Hardening of a Muller C-Element";
Talk: 2012 Single Event Effects Symposium (SEE 2012),
San Diego, USA;
2012-04-03
- 2012-04-05; in: "2012 Single Event Effects Symposium",
(2012).
V. S. Veeravalli, A. Steininger:
"LFSR Implementation Using C-Elements";
Talk: MEMICS 2012,
Znjomo, Czechia;
2012-10-25
- 2012-10-28; in: "MEMICS 2012",
(2012),
73
- 83.
V. S. Veeravalli, A. Steininger:
"Long Term On-Chip Monitoring of SET Pulsewidths in a Fully Digital ASIC";
Talk: 22nd Austrian Workshop on Microelectronics,
Graz;
2014-10-09; in: "Proceedings of the 22nd Austrian Workshop on Micorelectronics",
IEEE,
(2014),
ISBN: 978-1-4799-7243-2;
Paper ID 24,
6 pages.
V. S. Veeravalli, A. Steininger:
"Monitoring Single Event Transient Effects in Dynamic Mode";
Talk: 1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012),
Annecy, France;
2012-05-28
- 2012-06-01; in: "1st Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2012)",
(2012),
51
- 54.
V. S. Veeravalli, A. Steininger:
"Performance of Radiation Hardening Techniques under Voltage and Temperature Variations";
Talk: 2013 IEEE Aerospace Conference,
Big Sky, Montana, USA;
2013-03-02
- 2013-03-09; in: "Proc. 2013 IEEE Aerospace Conference",
(2013),
6 pages.
V. S. Veeravalli, A. Steininger:
"Radiation-Tolerant Combinational Gates - An Implementation Based Comparison";
Talk: 15th IEEE International Conference on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2012),
Tallinn, Estonia;
2012-04-18
- 2012-04-20; in: "Design and Diagnostics of Electronic Circuits Systems (DDECS), 2012 IEEE 15th International Symposium on",
(2012),
115
- 120.
V. S. Veeravalli, A. Steininger:
"Reliable and Continuous Measurement of SET Pulse Widths";
Talk: 18th Euromicro Conference on Digital System Design,
Funchal, Portugal;
2015-08-26
- 2015-08-28; in: "18th Euromicro Conference on Digital System Design",
(2015),
8 pages.
V. S. Veeravalli, A. Steininger:
"Study of a Delayed Single-Event Effect in the Muller C-element";
Poster: 21st IEEE European Test Symposium,
Amsterdam;
2016-05-24
- 2016-05-27; in: "Proc 21st IEEE European Test Symposium",
(2016),
ISBN: 978-1-4673-9659-2.
V. S. Veeravalli, A. Steininger, U. Schmid:
"Measuring SET Pulsewidths in Logic Gates using Digital Infrastructure";
Talk: 15th International Symposium & Exhibit on Quality Electronic Design,
Santa Clara, USA;
2014-03-10
- 2014-03-12; in: "Proceedings 15th International Symposium & Exhibit on Quality Electronic Design",
(2014),
ISBN: 978-1-4799-3946-6;
7 pages.
V. S. Veeravalli, A. Steininger, U. Schmid, T. Polzer:
"Architecture and Design Analysis of a Digital Single-Event Transient/Upset Measurement Chip";
Talk: 15th Euromicro Symposium on Digital System Design: Architectures, Methods and Tools (DSD 2012),
Izmir, Turkey;
2012-09-05
- 2012-09-08; in: "Proceedings 15th Euromicro Symposium on Digital System Design: Architectures, Methods and Tools (DSD'12)",
(2012),
8
- 17.
V. Venceslai, A. Marchisio, I. Alouani, M. Martina, M. Shafique:
"NeuroAttack: Undermining Spiking Neural Networks Security through Externally Triggered Bit-Flips";
Talk: 2020 International Joint Conference on Neural Networks (IJCNN),
Glasgow, UK;
2020-07-19
- 2020-07-24; in: "Proceedings of 2020 International Joint Conference on Neural Networks (IJCNN)",
IEEE,
(2020),
ISBN: 978-1-7281-6926-2;
1
- 8.
V. Venkataramani, A. Pathania, M. Shafique, T. Mitra, J. Henkel:
"Scalable Dynamic Task Scheduling on Adaptive Many-Core";
Talk: IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC),
Hanoi, Vietnam;
2018-09-12
- 2018-09-14; in: "IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)",
(2018),
ISBN: 978-1-5386-6689-0;
168
- 175.
A. Viale, A. Marchisio, M. Martina, G. Masera, M. Shafique:
"CarSNN: An Efficient Spiking Neural Network for Event-Based Autonomous Cars on the Loihi Neuromorphic Research Processor";
Talk: 2021 International Joint Conference on Neural Networks,
Virtual Conference;
2021-07-18
- 2021-07-22; in: "Proceedings of the 2021 International Joint Conference on Neural Networks",
(2021).
J. Vilanek, A. Steininger:
"FPGA Implementation of the Time-Triggered Protocol Controller TTPC-C Verification, Design-Experiences and Benefits";
Talk: World Multiconference on Systemics, cybernetics and Informatics,
Orlando, Florida, USA;
2002-07-14
- 2002-07-18; in: "PROCEEDINGS",
(2002),
407
- 412.
B. Weiss, G. Gridling, M. Proske:
"A Case Study in Efficient Microcontroller Education";
Talk: Workshop on Embedded Systems Education,
Jersey City, New Jersey;
2005-09-22; in: "Proceedings Workshop on Embedded Systems Education WESE 2005",
(2005),
36
- 43.
J. Widder:
"Booting clock synchronization in partially synchronous systems.";
Talk: International Conference on Distributed Computing Systems,
Sorrento, Italy;
2003-10-01
- 2003-10-03; in: "Proceedings of the 17th International Symposium on Distributed Computing ",
(2003),
121
- 135.
J. Widder, G. Gridling, B. Weiss, J. Blanquart:
"Synchronous Consensus with Mortal Byzantines";
Talk: IEEE Conference on Dependable Systems and Networks (DSN),
Edinburgh;
2007-06-25
- 2007-06-28; in: "Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks",
(2007).
J. Widder, G. Le Lann, U. Schmid:
"Failure Detection with Booting in Partially Synchronous Systems";
Talk: European Dependable Computing Conference,
Budapest, Ungarn;
2005-04-20
- 2005-04-22; in: "Dependable Computing Conference - EDCC5",
(2005),
20
- 37.
K. Winkler, U. Schmid, Y. Moses:
"A Characterization of Consensus Solvability for Closed Message Adversaries";
Talk: 23rd International Conference on Principles of Distributed Systems (OPODIS 2019),
Neuchâtel, Switzerland;
2019-12-17
- 2019-12-19; in: "23rd International Conference on Principles of Distributed Systems",
(2019),
17:1
- 17:16.
K. Winkler, U. Schmid, T. Nowak:
"Valency-based Consensus under Message Adversaries without Limit-Closure";
Talk: Fundamentals of Computation Theory,
Athens, Greece;
2021-09-12
- 2021-09-15; in: "Proceedings 23rd International Symposium on Fundamentals of Computation Theory (FCT'21)",
Springer,
Lecture Notes in Computer Science LNCS 12867
(2021),
ISBN: 978-3-030-86592-4;
457
- 474.
J. Zang, K. Liu, F. Khalid, M. Hanif, S. Rehman, T. Theocharides, A. Artussi, M. Shafique, S. Garg:
"INVITED: Building Robust Machine Learning Systems: Current Progress, Research Challenges, and Opportunities";
Talk: 2019 56th ACM/IEEE Design Automation Conference (DAC),
Las Vegas, USA;
2019-06-02
- 2019-06-06; in: "Proceeding of 2019 56th ACM/IEEE Design Automation Conference (DAC'19)",
IEEE,
(2019),
ISBN: 978-1-4503-6725-7;
1
- 4.
M. Zeiner, U. Schmid, M. Schwarz:
"On Linear-Time Data Dissemination in Dynamic Rooted Trees";
Talk: 19th ÖMG Congress and Annual DMV Meeting,
Salzburg;
2017-09-11
- 2017-09-15; in: "19th ÖMG Congress and Annual DMV Meetig Program and Books of Abstracts",
(2017),
87.
M. Zeiner, M. Schwarz, U. Schmid:
"On linear-time data dissemination in dynamic trees";
Talk: CSASC 2018,
Bratislava;
2018-09-11
- 2018-09-14; in: "CSASC 2018 - Book of Abstracts",
(2018),
113.
Talks and Poster Presentations (without Proceedings-Entry)
M. Delvai, U. Eisenmann, W. Elmenreich:
"A Generic Architecture for Integrated Smart Transducers";
Talk: International Conference, FPL 2003,
Lissabon, Portugal;
2003-09-01
- 2003-09-03.
M. Delvai, A. Steininger:
"ASPEAR - An Asynchronous 16 Bit RISC Processor Core";
Poster: Siemens PSE Technology Day,
Wien;
2005-11-25.
D. Dolev, M Függer, M. Hofstätter, C. Lenzen, M. Perner, M. Posch, U. Schmid, M. Sigl, A. Steininger:
"FATAL+HEX: Fault-Tolerant Self-Stabilizing Clock Generation+Distribution";
Poster: Poster Session at the CSAIL Industry Affiliates Program (CSAIL-IAP) Annual Meeting,
Cambridge, MA, USA;
2013-05-29
- 2013-05-30.
D. Dolev, M Függer, C. Lenzen, U. Schmid:
"Towards Self-stabilizing Byzantine Fault-Tolerant Clock Generation in Systems-on-Chip";
Talk: NITRD Workshop,
Baltimore, USA (invited);
2012-10-15
- 2012-10-16.
M Függer:
"Fault-Tolerant Distribiuted on-chip Algorithms";
Talk: RiSE GUGGING (IST AUSTRIA),
Gugging (IST Austria) (invited);
2010-11-04.
M Függer:
"Fault-Tolerant Distribiuted on-chip Algorithms";
Talk: FK 2010 (Forschungskooperation TU Wien - UNI Brno),
Brno, Czech Republic (invited);
2010-12-03.
M Függer:
"Fault-Tolerant Distribiuted on-chip Algorithms";
Talk: PUMA 2010,
Szentendre, Hungary (invited);
2010-10-12.
M Függer, J. Widder:
"On Efficient Checking of Link-reversal-based Concurrent Systems";
Talk: PUMA/RISE Seminar,
Traunkirchen;
2011-10-03
- 2011-10-07.
L. Gréaux, R. Kuznets, L. Prosperi, U. Schmid:
"What do Byzantine agents know?";
Talk: First joint workshop by the Mathematics and the Philosophy Research Institutes of UNAM,
Mexiko-Stadt, Mexiko (invited);
2018-08-06
- 2018-08-09.
M. Hofbauer, K. Schweiger, H. Dietrich, H. Zimmermann, K.O. Voss, B Merk, U. Schmid, A. Steininger:
"Pulse Shape Measurements by On-chip Sense Amplifiers of Single Event Transients Propagating through a 90 nm Bulk CMOS Inverter Chain";
Poster: Nuclear and Space Radiation Effects Conference (NSREC),
Miami, FL, USA;
2012-07-16
- 2012-07-20.
M. Hofbauer, K. Schweiger, W. Gaberl, H. Zimmermann, U. Giesen, F. Langner, U. Schmid, A. Steininger:
"Single Event Transient Pulse Shape Measurements by On-chip Sense Amplifiers in a Single Inverter for Intermediate Input States under Alpha Particle Irradiation";
Poster: IEEE Nuclear and Space Radiation Effects Conference (NSREC),
San Francisco, California (USA);
2013-07-08
- 2013-07-12.
P. Jahn, T. Polzer:
"Graphical Microcontroller Programming (GMCP)";
Poster: IEEE International Conference on Industrial Informatics - INDIN 2007,
Vienna, Austria;
2007-07-23
- 2007-07-27.
A. John, I. Konnov, U. Schmid, H. Veith, J. Widder:
"Counter Attack against Byzantine Generals";
Talk: Alpine Verification Meeting,
Passau, Bayern, Deutschland;
2012-05-21
- 2012-05-22.
A. John, I. Konnov, U. Schmid, H. Veith, J. Widder:
"Parameterized Model Checking of Fault-tolerant Distributed Algorithms";
Talk: Dagstuhl Seminar 12461: Games and Decisions for Rigorous Systems Engineering,
Dagstuhl, Deutschland (invited);
2012-11-11
- 2012-11-16.
A. John, I. Konnov, U. Schmid, H. Veith, J. Widder:
"Who is afraid of Model Checking Distributed Algorithms?";
Talk: PUMA/RISE Seminar,
Goldegg;
2012-09-24
- 2012-09-28.
A. Kößler:
"Challenges in Fault-Tolerant Distribiuted Real-Time Systems";
Talk: RiSE Workshop TU Graz,
Szentendre, Hungary;
2010-02-22
- 2010-02-23.
I. Konnov, M. Lazić, H. Veith, J. Widder:
"Parameterized Verification of Liveness of Distributed Algorithms";
Talk: Workshop on Formal Reasoning in Distributed Algorithms (FRiDA),
Marrakech, Marocco;
2016-05-17.
R. Kuznets:
"Causality in the Age of Fake News";
Talk: Seminar "Logic and Theoretical Computer Science", University of Bern (2019),
Bern (invited);
2019-10-31.
R. Kuznets:
"Extrapolating Interpolation";
Keynote Lecture: Proof Theory in Logic workshop,
Utrecht (invited);
2019-07-01
- 2019-07-02.
R. Kuznets:
"Interpolation using sequents and their generalisations";
Keynote Lecture: PhDs in Logic X,
Prague (invited);
2018-05-01
- 2018-05-04.
R. Kuznets:
"The Byzantine Mind";
Talk: Seminar Logic and Theoretical Computer Science, University of Bern (2017),
Bern, Schweiz (invited);
2017-11-16.
R. Kuznets:
"Time and Retrocausality in Distributed Systems";
Talk: Goedel's Legacy,
Wien;
2019-07-25
- 2019-07-27.
R. Kuznets, B. Lellmann:
"Interpolation for Intermediate Logics via Injective Nested Sequents";
Talk: Online Partout Seminar,
online, France (invited);
2020-11-09.
R. Kuznets, B. Lellmann:
"Translating Quantitative Semantic Bounds into Nested Sequents";
Talk: Fifth TICAMORE MEETING,
Wien (invited);
2019-11-11
- 2019-11-13.
R. Kuznets, S. Marin, L. Strassburger:
"Intuiting Duals of Proofs";
Talk: Milano Logic Group Logic Lunch Seminar Series,
online, Italy (invited);
2021-03-11.
R. Kuznets, L. Prosperi, U. Schmid, K. Fruzsa:
"Byzantine Causal Cone";
Talk: Workshop on Formal Reasoning in Distributed Algorithms (FRiDA),
Budapest, Hungary (invited);
2019-10-18.
M. Lazić, I. Konnov, H. Veith, J. Widder:
"Model Checking of Threshold-based Fault-Tolerant Distributed Algorithms";
Talk: 7th Workshop on Program Semantics, Specification and Verification: Theory and Applications,
St. Petersburg, Russia (invited);
2016-07-14
- 2016-07-15.
P. Paulweber, J. Maier, J. Cortadella:
"Unified (A)Synchronous Circuit Development";
Talk: 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2019),
Hirosaki, Japan;
2019-05-12
- 2019-05-15.
U. Schmid:
"Digital Modeling of Asynchronous Integrated Circuits";
Talk: 2nd Workshop on Hardware Design and Theory (https://sites.google.com/view/motimedina/hdt-2019, colocated with DISC 2019),
Budapest;
2019-10-18.
U. Schmid:
"Easy Impossibility Proofs for k-Set Agreement";
Talk: Dagstuhl Seminar #16282 Topological Methods in Distributed Computing,
Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik (invited);
2016-07-10
- 2016-07-15.
U. Schmid:
"Honors at TU Wien";
Talk: International Conference on Talent Development and Honors Education (World of Talent 2021),
Groningen, The Netherlands (invited);
2021-06-16
- 2021-06-18.
U. Schmid:
"Reconciling Fault-Tolerance and Robustness ?";
Keynote Lecture: Workshop on Design and Analysis of Robust Systems @ CPS-Week 2016,
Hofburg Vienna, Austria (invited);
2016-04-11.
U. Schmid:
"The Theta-Model";
Talk: Diskussionskreis Fehlertoleranz,
Berlin;
2004-11-12.
U. Schmid:
"Wissenschaftliche Forschung - Quo vadis?";
Talk: IKT in Österreich 2006,
Wien (invited);
2006-12-05
- 2006-12-06.
M. Shafique:
"Approximate Computing across the Hardware and Software Stacks";
Talk: Invited Talks at TU Eindhoven,
TU Eindhoven, Netherlands (invited);
2017-05-30.
M. Shafique:
"Cross-Layer Approximate Computing: From Circuits to Applications";
Talk: Invited Talks at University of Twente,
University of Twente, Netherlands (invited);
2017-06-02.
M. Shafique:
"Emerging Brain-Inspired Computing Trends: From Approximate Computing to Neural Processing";
Keynote Lecture: International Conference On Latest Trends in Electrical Engineering and Computing Technologies (INTELLECT'17),
Karachi, Pakistan (invited);
2017-11-15
- 2017-11-16.
M. Shafique:
"Enabling Extreme Energy-Efficiency through Brain-Inspired Computing Trends: From Approximate to Neural Processing";
Keynote Lecture: 15th International Conference On Frontiers of Information Technology (FIT'17),
Islamabad, Pakistan (invited);
2017-12-18
- 2017-12-20.
M. Shafique:
"Low-Power Computing and Emerging Trends";
Talk: CPS Summer School 2017,
Porto Conte Ricerche, Alghero, Italy;
2017-09-25
- 2017-09-30.
M. Shafique:
"Robust Heterogeneous Computing for CPS";
Talk: CPS Summer School 2017,
Porto Contr Ricerche, Alghero, Italy;
2017-09-25
- 2017-09-30.
A. Steininger:
"The DARTS project";
Talk: ESA Workshop,
Wien;
2006-05.
A. Steininger:
"The ECS group's hardware related research activities";
Talk: Firma Freescale,
München;
2006-02-17.
S. Tauner, M. Telesklav, L. Halder:
"Hardware-Assisted Control Flow Integrity Schemes on RISC-V";
Talk: Second International Workshop on Secure RISC-V (SECRISC-V),
Virtual (invited);
2021-11-07.
J. Widder:
"The Theta-Model, and how to Boot Clock Synchronization in it";
Talk: Seminaire Reflecs in INRIA Rocquencourt, Frankreich,
INRIA Rocquencourt, Frankreich (invited);
2004-02-10.
J. Widder:
"VLSI Design and the Theta-Model (Kurzvorstellungen aktueller Forschung)";
Talk: Diskussionskreis Fehlertoleranz,
Berlin;
2004-11-12.
J. Widder:
"Why, Where and How to Use the Theta-Model";
Talk: Seminaire Reflecs in INRIA Rocquencourt, Frankreich,
INRIA Rocquencourt, Frankreich (invited);
2004-03-10.
J. Widder, G. Gridling, B. Weiss, J. Blanquart:
"Synchronous Consensus with Mortal Byzantines";
Talk: Dagstuhl Seminar 06371. From Security to Dependability,
Dagstuhl (invited);
2006-09-10
- 2006-09-15.
M. Zeiner, M Függer, T. Nowak, U. Schmid:
"Optimal Strategies for Repeated Leader Election";
Talk: Joint Austrian-Hungarian Mathematical Conference 2015,
Györ;
2015-08-25
- 2015-08-27.
M. Zeiner, M Függer, U. Schmid, A. Kößler, T. Nowak:
"The Effect of Forgetting on the Performance of a Synchronizer";
Talk: 18th ÖMG Congress and Annual DMV Meeting,
Innsbruck;
2013-09-23
- 2013-09-27.
M. Zeiner, M. Schwarz, K. Winkler, U. Schmid:
"Broadcasting in Random Trees";
Talk: ALEA in Europe - Young Researchers Workshop,
TU Wien;
2016-09-06
- 2016-09-09.
Patents
U. Schmid, A. Steininger:
"Dezentrale Fehlertolerante Taktgenerierung in VLSI Chips";
Patent: Österreich,
submitted: 2004.
K. Thaller:
"Verfahren und Einrichtung zum Test eines Speichers";
Patent: Österreich,
No. AT 409 562 B;
submitted: 2001-03-16,
granted: 2002-01-15.
Habilitation Theses
A. Steininger:
"Testing of Fault-Tolerant Computers";
TU Wien,
1998.
Doctor's Theses (authored and supervised)
K. Ambrosch:
"Mapping Stereo Matching Algorithms to Hardware";
Supervisor, Reviewer: A. Steininger, R. Siegwart;
Institut für Technische Informatik,
2009.
E. Armengaud:
"A Transparent Online Test Approach for Time-Triggered Communication Protocols";
Supervisor, Reviewer: A. Steininger, F. Simonot-Lion;
Institut für technische Informatik,
2008.
M. Biely:
"Dynamic Aspects of Modelling Distributed Computations";
Supervisor, Reviewer: U. Schmid, B. Charron-Bost;
Institut für Technische Informatik,
2009;
oral examination: 2009-11-30.
M. Delvai:
"Design of an Asynchronous Processor Based on Code Alternation Logic - Treatment of Non-Linear Data Paths";
Supervisor, Reviewer: A. Steininger, R. Eier;
Institut für Technische Informatik / Embedded Computing Systems,
2005.
M. Ferringer:
"Asynchronous Logic in Real-Time Systems";
Supervisor, Reviewer: A. Steininger, G. Fohler;
Institut für Technische Informatik,
2012.
W. Friesenbichler:
"Effects and Mitigation of Transient Faults in Quasi Delay-Insensitive Logic";
Supervisor, Reviewer: A. Steininger, H. Vierhaus;
Institut für Technische Informatik,
2012.
G. Fuchs:
"Fault-Tolerant Distributed Algorithms for On-Chip Tick Generation: Concepts, Implementations and Evaluations";
Supervisor, Reviewer: A. Steininger, C. Metra;
Institut für Technische Informatik,
2009;
oral examination: 2009-10-20.
M Függer:
"Analysis of On-Chip Fault-Tolerant Distributed Algorithms";
Supervisor, Reviewer: U. Schmid, L. Welch;
Institut für Technische Informatik - 182/2,
2010.
M. Horauer:
"Clock Synchronization in Distributed Systems";
Supervisor, Reviewer: R. Eier, U. Schmid;
Institut für Computertechnik,
2004.
W. Huber:
"Design of an Asynchronous Processor Based on Code Alternation Logic - Exploration of Delay Insensitivity";
Supervisor, Reviewer: A. Steininger, R. Eier;
Technische Informatik, E182/2,
2005;
oral examination: 2005.
M. Hutle:
"Failure Detection in Sparse Networks";
Supervisor, Reviewer: U. Schmid;
Technische Informatik, E182/2,
2005;
oral examination: 2005.
S. Khattab:
"Efficient Interference Reduction in Low Complex Digital Direct Sequence Spread Spectrum Systems";
Supervisor, Reviewer: A. Goiser, U. Schmid;
E389,
2010;
oral examination: 2010-06-02.
A. Kößler:
"Real-Time Performance Analysis of Synchronous Distributed Systems";
Supervisor, Reviewer: U. Schmid, K. Chatterjee;
Institut für Technische Informatik (E182/2),
2014;
oral examination: 2014-11-27.
T. Kottke:
"Untersuchung von fehlertoleranten Prozessorarchitekturen für sicherheitsrelevante Automobilanwendungen";
Supervisor, Reviewer: A. Steininger, H. Wunderlich;
Institut für Technische Informatik,
2005.
J. Lechner:
"Building Robust GALS Circuits: Fault-Tolerant and Variation-Aware Design Techniques for Reliable Circuit Operation";
Supervisor, Reviewer: A. Steininger, J. Sparso;
Institut für Technische Informatik,
2014;
oral examination: 2014-06-17.
H. Moser:
"A Model for Distributed Computing in Real-Time Systems";
Supervisor, Reviewer: U. Schmid, L. Welch;
Institut für Technische Informatik,
2009;
oral examination: 2009-05-20.
H. Muhr:
"Concepts for Virtual Prototyping of Distributed Embedded Systems";
Supervisor, Reviewer: D. Dietrich, A. Steininger;
Institut für Computertechnik,
2008;
oral examination: 2008-12-22.
S. Naqvi:
"A Non-Blocking Fault-Tolerant Asynchronous Networks-on-Chip Router";
Supervisor, Reviewer: A. Steininger, E. Grass, M. Schöberl;
Institut für Technische Informatik,
2013.
T. Panhofer:
"Self-Healing Asynchronous Circuits for High-Reliability Applications";
Supervisor, Reviewer: A. Steininger, H. Vierhaus;
Institut für Technische Informatik,
2012.
M. Perner:
"Fault-Tolerant Clock Distribution in Grid-Like Networks";
Supervisor, Reviewer: U. Schmid, A. Jantsch, M. Krstic;
Institut für Computer Engineering (E191-02),
2019;
oral examination: 2019-10-16.
T. Polzer:
"A Digital Metastability Model for VLSI Circuits";
Supervisor, Reviewer: A. Steininger, A. Yakovlev;
Institut für Technische Informatik,
2013.
B. Rahbaran:
"An Experimental Comparison of Robustness between Synchronous and Asynchronous Logic Design";
Supervisor, Reviewer: A. Steininger, R. Eier;
Technische Informatik, E182/2,
2005;
oral examination: 2005.
T. Reinbacher:
"Analysis of Embedded Real-Time Systems at Runtime";
Supervisor, Reviewer: A. Steininger, J. Schumann, S. Kowalewski;
Institut für Technische Informatik,
2013.
S. Resch:
"Composability for Fail-Safe Safety-Critical Systems";
Supervisor, Reviewer: A. Steininger, W. Elmenreich;
Technische Informatik,
2014;
oral examination: 2015-01-26.
P. Robinson:
"Weak System Models for Fault-Tolerant Distributed Agreement Problems";
Supervisor, Reviewer: U. Schmid, M. Raynal;
Institut für Technische Informatik (E182/2),
2011;
oral examination: 2011-01-31.
C. Scherrer:
"Zuverlässigkeit zweifach redundanter Architekturen unter besonderer Berücksichtigung latenter Fehler";
Supervisor, Reviewer: A. Steininger, R. Patzelt;
Institut für Technische Informatik,
2002.
M. Schöberl:
"JOP: A Java Optimized Processor for Embedded Real-Time Systems";
Supervisor, Reviewer: A. Steininger, P. Puschner;
Technische Informatik, E182,
2005;
oral examination: 2005.
M. Schwarz:
"Agreement Algorithms in Directed Dynamic Networks";
Supervisor, Reviewer: U. Schmid, E. Godard;
Institut für Computer Engineering,
2018;
oral examination: 2018-06-15.
H. Stratil:
"Advantages and Limitations of Position-based Communication in Wireless Ad-hoc Networks";
Supervisor, Reviewer: U. Schmid;
Technische Informatik, E182/2,
2005;
oral examination: 2005.
K. Thaller:
"A Transparent Online Memory Test";
Supervisor, Reviewer: A. Steininger, R. Eier;
Institut für Technische Informatik,
2001.
P Tummeltshammer:
"Analysis of Common Cause Faults in Dual Core Architectures";
Supervisor, Reviewer: A. Steininger, Z. Kotasek;
Institut für Technische Informatik,
2009;
oral examination: 2009-10-20.
V. S. Veeravalli:
"Design of Custom ASIC for Radiation Experiments to Study Single Event Effects";
Supervisor, Reviewer: C. Metra, M. Krstic;
Technische Informatik,
2017;
oral examination: 2017-11-24.
J. Vilanek:
"Zur Rolle der Verifikation im Designprozess digitaler integrierter Schaltungen";
Supervisor, Reviewer: A. Steininger, R. Eier;
Institut für Technische Informatik,
2001.
J. Widder:
"Distributed Computing in the Presence of Bounded Asynchrony";
Supervisor, Reviewer: U. Schmid, M. Jazayeri;
Institut für Technische Informatik / Embedded Computing Systems,
2004.
K. Winkler:
"Characterization of Consensus Solvability under Message Adversaries";
Supervisor, Reviewer: U. Schmid, S. Rajsbaum, S. Schmid;
Institut für Computer Engineering,
2019;
oral examination: 2019-10-23.
Diploma and Master Theses (authored and supervised)
D. Albeseder:
"Experimentelle Verifikation von Synchronitätsannahmen für Computernetzwerke";
Supervisor: U. Schmid;
Institut für Technische Informatik / Embedded Computing Systems,
2004.
E. Armengaud:
"Data Path for a FlrxRay-to-FlexRay Gateway";
Supervisor: A. Steininger;
Institut für Technische Informatik,
2002.
F. Beck:
"People tracking using particle filters and an advanced human motion model on mobile robots";
Supervisor: J. Blieberger, M. Bader;
Institute of Computer Engineering,
2018;
final examination: 2018-04-11.
P. Behal:
"Quantitativer Vergleich der Empfindlichkeit von Delay-Insensitiven Design Templates gegenüber transienten Störungen";
Supervisor: A. Steininger;
Technische Informatik,
2021;
final examination: 2021-06-23.
M. Biely:
"Byzantine agreement under the perception-based fault model";
Supervisor: U. Schmid;
183,
2002.
M. Birner:
"SPEAR2C - Implementing a Cache Controller into SPEAR2";
Supervisor: A. Steininger;
191-02,
2011.
A. Burker:
"Implementation of the TTP/A Protocol and WCET Analysis on the SPEAR2 Platform";
Supervisor: A. Steininger;
191-02,
2011.
M. Delvai:
"Entwicklung eines Mikrokontrollers für das Echtzeitprotokoll TTP/A";
Supervisor: A. Steininger, W. Elmenreich;
Institut für Technische Informatik,
2000.
A. Dielacher:
"A Pipelined Distributed Fault-Tolerant Clock Generation Algorithm in VLSI - Proofs and Implementation";
Supervisor: U. Schmid, M Függer;
Institut für Technische Informatik - 182/2,
2010.
M. Eggenhofer:
"Entwicklung eines USB fullspeed VHDL-Cores";
Supervisor: J. Vilanek, A. Steininger;
Institut für Technische Informatik,
2003.
U. Eisenmann:
"Design and implementation of a highly efficient communication node for real-time applications";
Supervisor: A. Steininger, M. Delvai;
Institut für Technische Informatik,
2002.
C. El Salloum:
"Realisierung eines generischen Online Debuggers für Embedded Systems";
Supervisor: M. Delvai, A. Steininger;
Institut für Technische Informatik,
2003.
M. Ferringer:
"An Asynchronous Hardware Design for Distributed Tick Generation";
Supervisor: A. Steininger;
Technische Informatik, E182/2,
2006;
final examination: 2006.
P. Fimml:
"Temporal-Epistemic Logic in Byzantine Message-Passing Contexts";
Supervisor: U. Schmid;
Institut für Computer Engineering,
2018;
final examination: 2018-01-08.
M. Fletzer:
"SPEAR2 - An Improved Version of SPEAR";
Supervisor: M. Delvai;
Institut f. Technische Informatik, Embedded Computing Systems Group,
2008.
B. Fritz:
"Operation and Verification Framework for the FRad Experimental ASIC";
Supervisor: A. Steininger;
191-02,
2018.
B. Fuchs:
"Elaboration of a Fault-Tolerant Strategy for Space-born Digital Signal Processing Applications";
Supervisor: A. Steininger;
Technische Informatik,
2012.
G. Fuchs:
"A Superscalar 16 Bit Microcontroller for Real-Time Applications";
Supervisor: A. Steininger, M. Delvai;
Institut für Technische Informatik / Embedded Computing Systems,
2004.
M Függer:
"Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip";
Supervisor: U. Schmid;
Technische Informatik, E182/2,
2006;
final examination: 2006.
R. Gallo:
"Revision and Verification of an Enhanced UART";
Supervisor: M. Delvai, A. Steininger;
Technische Informatik, E182/2,
2005;
final examination: 2005.
A. Hagmann:
"Performance Aware Hardware Runtime Monitors";
Supervisor: A. Steininger;
Institut für Technische Informatik,
2013.
T. Handl:
"Implementierung eines FPGA-basierten Hardware-Fehlerinjektors";
Supervisor: A. Steininger;
Institut für Technische Informatik / Embedded Computing Systems,
2004.
O. Hechinger:
"Analysis of the Failure Behavior of Memory Management Units";
Supervisor: A. Steininger;
Institut für technische Informatik,
2013.
A. Heinisch:
"Selection and Hardware-Implementation of an Efficient Consensus Algorithm for a Mesochronous System";
Supervisor: T. Polzer, A. Steininger;
Technische Informatik,
2015;
final examination: 2015-01-15.
C. Hermann:
"ASCARTS Design of an Asynchronous Processor using a High-Level Specification Language";
Supervisor: A. Steininger, J. Lechner;
Institut für Technische Informatik,
2016.
T. Hinterstoisser:
"Entwicklung eines Mikroprozessorsmit Built-in Self-Test";
Supervisor: A. Steininger;
Institut für Technische Informatik,
2000.
M. Hofstätter:
"Solving the Labeling Problem - A Byzantine Fault-Tolerant Self-Stabilizing FPGA Prototype based on the FATAL+ Protocol";
Supervisor: U. Schmid, M Függer;
Institut für technische Informatik,
2013;
final examination: 2013-10-08.
W. Huber:
"Simulation einer SCSI-Festplatte unter LINUX";
Supervisor: A. Steininger;
Institut für Technische Informatik,
2000.
F. Huemer:
"Protecting 4-Phase Delay-Insensitive Communication Against Transient Faults";
Supervisor: A. Steininger;
Technische Informatik,
2017;
final examination: 2017-02-20.
M. Hutle:
"Constraint Satisfaction Problems - Hyprid Decompostion and Evaluation";
Supervisor: F. Wotawa;
Institut für Informationssysteme,
2002.
P. Jahn:
"Automated Regression Testing of Embedded Devices";
Supervisor: A. Steininger, A. Reisenbauer;
Institut für Technische Informatik,
2009.
M. Jankela:
"Realization of a Re-Usable Offline Debugger for the SPEAR Micro-Controller";
Supervisor: A. Steininger, M. Delvai;
Institut für Technische Informatik,
2002.
M. Jeitler:
"Optimization of FSL Gates";
Supervisor: M. Delvai;
Institut für Technische Informatik,
2008.
W. Klein:
"Asynchronous EUART";
Supervisor: M. Delvai;
Institut f. technische Informatik, Embedded Computing Systems Group,
2008.
R. Kutschera:
"Efficient Interfacing Between Timing Domains";
Supervisor: A. Steininger;
Technische Informatik,
2014.
J. Lechner:
"FSL Tool";
Supervisor: M. Delvai;
Institut f. Technische Informatik, Embedded Computing Systems Group,
2008.
J. Lechner:
"Implementation of a Design Tool for Generation of FSL Circuits";
Supervisor: A. Steininger;
191-02,
2008.
J. Maier:
"Online Test Vector Insertion - A Concurrent Built-In Self-Testing (CBIST) Approach for Asynchronous Logic";
Supervisor: A. Steininger;
Technische Informatik,
2014.
H. Moser:
"Distributed Construction of a Fault-Tolerant Wireless Communication Topology for Networked Embedded Systems";
Supervisor: U. Schmid;
Institut für Technische Informatik / Embedded Computing Systems,
2005.
J. Mosser:
"AMBA4SPEAR2: An AMBA Extension Module for the SPEAR2 Processor Core";
Supervisor: M. Delvai;
Institut f. Technische Informatik, Embedded Computing Systems Group,
2008.
R. Najvirt:
"Description Methods for Asynchronous Circuits - A Comparison";
Supervisor: A. Steininger;
191-02,
2011.
T. Nowak:
"Topology in Distributed Computing";
Supervisor: U. Schmid;
Institut für Technische Informatik - 182/2,
2010.
J. Obermüller:
"SoC FPGA Oszilloskop - Implementierung eines Oszilloskops auf einem FPGA mit eingebettetem Prozessor";
Supervisor: A. Steininger;
191-02,
2018.
K. Pados:
"Design and Evaluation of an AXI4 Bus System";
Supervisor: A. Steininger;
Institut für technische Informatik,
2013.
T. Pedram:
"Asynchrone Realisierung einer Arithmetic Logic Unit";
Supervisor: M. Delvai, A. Steininger;
Institut für Technische Informatik,
2003.
M. Perner:
"Self-Stabilizing Byzantine Fault-Tolerant Clock Distribution in Grids";
Supervisor: U. Schmid;
Institut für technische Informatik,
2013;
final examination: 2013-10-08.
D. Pfleger:
"Knowledge and Communication Complexity in Distributed Systems";
Supervisor: U. Schmid;
Institut für Computer Engineering,
2018;
final examination: 2018-04-11.
T. Polzer:
"Fault-Tolerant Hardware Implementation of a Consensus Algorithm";
Supervisor: A. Steininger, T. Handl;
Institut für Technische Informatik,
2009.
W. Ramsl:
"Fault Masking in Synchronous and in Asynchronous Logic - A Comparison";
Supervisor: A. Steininger;
191-02,
2019.
C. Resanka:
"Communication protocol test device in VHDL";
Supervisor: A. Steininger;
Institut für Technische Informatik,
2002.
S. Resch:
"Hardware Description with Timing Requirements";
Supervisor: A. Steininger;
191-02,
2011.
M. Schütz:
"COTS FPGAs in Space -- From old Concerns to new Possibilities";
Supervisor: A. Steininger;
191-02,
2018.
M. Schwarz:
"Solving k-Set Agreement in Dynamic Networks";
Supervisor: U. Schmid;
Institut für technische Informatik,
2013;
final examination: 2013-10-08.
R. Steinwendtner:
"Experimentelle Verifikation eines Transparent Online Memory Test";
Supervisor: A. Steininger;
Institut für Technische Informatik,
2000.
H. Stratil:
"Topology Management and Routing in Wireless Networks - An Overview";
Supervisor: U. Schmid;
183,
2002.
M. Telesklav:
"Implementierung, Erweiterung und Evaluierung von hardwaregestützen CFG-basierenden Programmflußüberwachungen";
Supervisor: A. Steininger;
Technische Informatik,
2021;
final examination: 2021-03-11.
B. Thallner:
"Ein Linuxtreiber für den Europäischen Installationsbus EIB";
Supervisor: W. Kastner, G. Schildt;
Institut für Rechnergestützte Automation,
2001.
C. Trenkwalder:
"Effekte von Stuck-At Faults in Delay-Insensitiver Logik";
Supervisor: A. Steininger;
Technische Informatik,
2014.
P Tummeltshammer:
"Multiple Constant Multiplication by Time-Multiplexed Mapping of Addition Chains";
Supervisor: A. Steininger;
Institut für Technische Informatik / Embedded Computing Systems,
2004.
J. Vilanek:
"Synthese eines SAB-R3223 in VHDL und State Charts";
Institut für Technische Informatik,
1997.
M. Walter:
"The SPEAR2 Hardware/Software Interface";
Supervisor: A. Steininger;
191-02,
2011.
C. Widtmann:
"High-Level System Modeling with SystemC and TLM";
Supervisor: A. Steininger;
191-02,
2009.
K. Winkler:
"Easy Impossibility Proofs for k-Set Agreement";
Supervisor: U. Schmid;
Institut für technische Informatik,
2013;
final examination: 2013-11-22.
Scientific Reports
E. Armengaud:
"Accurate Diagnosis Method with Access to Bit-Level";
Report for Research Report 93/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
E. Armengaud:
"FlexRay Parameter Classification";
Report for Research Report 92/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
E. Armengaud, M. Horauer:
"Monitoring and Replay Hardware -- Specification and Implementation";
Report for Research Report 90/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
E. Armengaud, F Rothensteiner, A. Steininger, M. Horauer:
"A Flexible Hardware Architecture for Fast Access on Large Non-Volatile Memories";
Report for Research Report 96/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
E. Armengaud, A. Steininger:
"Automatic Parameter Detection for Communication Protocols";
Report for Research Report 91/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
E. Armengaud, A. Steininger:
"Fault Injection Method";
Report for Research Report 94/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
E. Armengaud, A. Steininger, M. Horauer:
"Fault Injection -- Requirements and Concepts";
Report for Research Report 95/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
E. Armengaud, A. Steininger, M. Horauer:
"Monitoring and Replay hardware -- Requirements and Concepts";
Report for Research Report 89/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
M. Biely:
"Towards an optimal algorithm for hybrid Byzantine agreement.";
Report for Technical Report 183/1-130, Department of Automation, Technische Universität Wien, www.auto.tuwien.ac.at/Projects/W2F/papers.html;
2003.
M. Biely, P. Robinson, U. Schmid, M. Schwarz, K. Winkler:
"Gracefully Degrading Consensus and k-Set Agreement in Directed Dynamic Networks";
Report No. TUW-258404,
2016.
M. Biely, U. Schmid:
"Message-efficient consensus in presence of hybrid node and link faults";
Report for Technical Report 183/1-116, Department of Automation, Technische Universität Wien;
2001.
M. Delvai:
"Handbuch für SPEAR (Scalable Processor for Embedded Applications in Real-Time Environments)";
2002.
M. Delvai, A. Steininger, W. Huber:
"Solving the Fundamental Problem of Digital Design -- A Systematic Review of Design Methods";
Report for Research Report 88/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
C. El Salloum, A. Steininger:
"Recovery Mechanisms for Dual Core Architectures";
Report for Research Report 100/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
C. Fetzer, U. Schmid:
"On the Possibility of Consensus in Asynchronous Systems with Finite Average Response Times";
Report for Research Report 14/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
G. Fuchs, U. Schmid, A. Steininger:
"DARTS - Distributed Algorithms for Robust Tick Synchronization";
Report for Research Report 72/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
G. Fuchs, U. Schmid, A. Steininger:
"Ein Verfahren für das verteilte Generieren eines fehlertoleranten adaptiven Taktes in Hardware";
Report for Research Report 18/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
J.-F. Hermant, J. Widder:
"Implementing Time Free Designs for Distributed Real-Time Systems (A Case Study)";
Report for Research Report 23/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria (Joint research report with INRIA Rocquencourt, France);
2004.
M. Hofbauer, K. Schweiger, H. Dietrich, H. Zimmermann, U. Schmid, U. Giesen:
"Messung der Auswirkungen von ionisierender Strahlung auf 90 nm CMOS Schaltungen";
Report for Physikalisch Technische Bundesanstalt;
2012.
W. Huber:
"Peripherieanbindung an SPEAR Extension Modules";
2002.
W. Huber, T. Handl:
"Simulation von Signalen selbstdefinierten Typs in verschiedenen Stufen des Design-Flows";
2003.
W. Huber, A. Steininger, M. Delvai:
"Delay Insensitive Asychronous Pipeline Implementation for Code Alternation Logic";
Report for Research Report 85/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
M. Hutle, J. Widder:
"On the Possibility and the Impossibility of Time Free Self-Stabilizing Failure Detection";
Report for Research Report 34/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
M. Hutle, J. Widder:
"Time Free Self-Stabilizing Local Failure Detection";
Report for Research Report 33/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
A. Kinali, C. Lenzen, M. Perner:
"Fault-tolerant High-Performance Clock Distribution";
Report No. TUW-278925,
2019.
T. Kottke, A. Steininger:
"A Reconfigurable Generic Dual Core Architecture";
Report for Research Report 99/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
R. Kuznets, L. Strassburger:
"Maehara-style Modal Nested Calculi";
Report for HAL;
Report No. RR-9123,
2017;
21 pages.
J. Maier:
"Modeling the CMOS Inverter using Hybrid Systems";
Report No. TUW-259633,
2017.
H. Moser, B. Thallner:
"Distributed Construction of Fault-Tolerant Overlay Networks: Construction Algorithm";
Report for Research Report 39/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
D. Öhlinger:
"Involution Tool";
Report No. TUW-278633,
2018.
M. Perner, U. Schmid:
"Self-Stabilizing High-Speed Communication in Multi-Synchronous GALS Architectures";
Report for Institut für Technische Informatik;
Report No. TUW-268547,
2018.
D. Pfleger, U. Schmid:
"A Framework for Connectivity Monitoring in Wireless Sensor Networks";
Report No. TUW-241107,
2015.
D. Pfleger, U. Schmid:
"On Knowledge and Communication Complexity in Distributed Systems";
Report for Institute of Computer Engineering;
Report No. TUW-269752,
2018.
L. Prosperi, R. Kuznets, U. Schmid, K. Fruzsa, L. Gréaux:
"Knowledge in Byzantine Message-Passing Systems I: Framework and the Causal Cone";
Report for Institut für Technische Informatik;
Report No. TUW-260549,
2019.
B. Rahbaran:
"Die Wichtigsten Kommandos in der dc_shell(synopsys)";
Report for Research Report 5/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
B. Rahbaran:
"Performing Automatic Physical Injection of Signal-Flips and Delay Faults with the toolset FIDYCO";
Report for Research Report 46/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
B. Rahbaran, A. Steininger:
"A Strategy for Experimental Fault Injection into an Asynchronous Processor";
Report for Research Report 98/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
H. Rincon Galeana, K. Winkler, U. Schmid, S. Rajsbaum:
"A Topological View of Partitioning Arguments: Reducing k-Set Agreement to Consensus";
Report for Institut für Computer Engineering E191-02;
Report No. TUW-281149,
2019.
U. Schmid:
"Failure Model Coverage under Transient Link Failures";
Report for Research Report 2/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
U. Schmid:
"Final Report FWF FATAL-Project (P21694)";
Report No. TUW-235380,
2014.
U. Schmid:
"Final Report FWF PSRTS-Project (P20529)";
Report No. TUW-235379,
2013.
U. Schmid:
"Final Report START-Project Y41";
Report for Research Report 19/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
U. Schmid:
"FWF-Proposal ADynNet: Gracefully Degrading Agreement in Directed Dynamic Networks";
Report No. TUW-235381,
2014.
U. Schmid:
"FWF-Proposal DMAC: Digital Modeling of Asynchronous Integrated Circuits";
Report No. TUW-278607,
2018.
U. Schmid, H. Kopetz, P. Puschner, L. Mayerhofer, A. Steininger, H. Grünbacher, W. Kastner, A. Krall:
"Antrag UNI-Infrastruktur III, Embedded Systems Research Cluster";
2005.
U. Schmid, A. Steininger:
"Dezentrale Fehlertolerante Taktgenerierung in VLSI Chips";
Report for Research Report 69/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
U. Schmid, B. Weiss:
"Fault-Tolerant Distributed Algorithms in Sparse Ad Hoc Wireless Networks";
Report for Research Report 13/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
U. Schmid, B. Weiss:
"Impossibility results and lower bounds for consensus under link failures.";
Report for Technical Report 183/1-127, Department of Automation, Technische Universität Wien;
2003.
U. Schmid, B. Weiss:
"Synchronous Byzantine Agreement under Hybrid Process and Link Failures";
Report for Research Report 1/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
M. Schwarz, U. Schmid:
"On the Strongest Message Adversary for Consensus in Directed Dynamic Networks";
Report No. TUW-269285,
2018.
M. Schwarz, K. Winkler, U. Schmid:
"Fast Consensus under Eventually Stabilizing Message Adversaries";
Report No. TUW-240061,
2015;
13 pages.
M. Schwarz, K. Winkler, U. Schmid, M. Biely, P. Robinson:
"Gracefully Degrading Consensus and k-set Agreement under Dynamic Link Failures";
Report No. TUW-220473,
2013.
A. Steininger, M. Delvai, W. Huber:
"Code Alternation Logic (CAL): A Novel Efficient Design Approach for Delay-Insensitive Asynchronous Circuits";
Report for Research Report 87/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
A. Steininger, M. Delvai, W. Huber:
"Code Alternation Logic -- A Novel and Efficient Method for Delay-Insensitive Asynchronous Circuits";
Report for Research Report 84/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
A. Steininger, M. Delvai, W. Huber:
"Synchronous and Asynchronous Design Methods -- A Hardware Designer's Perspective";
Report for Research Report 86/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
A. Steininger, T. Handl, G. Fuchs:
"EPOCAL - Exploring the Potential of Code Alternation Logic";
Report for Research Report 71/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
A. Steininger, M. Horauer, E. Armengaud:
"Options for Remote Diagnosis in Automotive Distributed Networks";
Report for Research Report 97/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
H. Stratil:
"An efficient implementation of the greedy forwarding strategy";
Report for Research Report 16/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
H. Stratil:
"Design of a Voronoi-Aided Routing (VAR) Protocol for Wireless Sensor Networks";
Report for Research Report 15/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
H. Stratil:
"The usage of the Delaunay Triangulation (resp. the Voronoi Diagram) in dynamic wireless ad-hoc networks";
Report for Research Report 67/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
B. Thallner:
"Distributed Construction of Fault-Tolerant Overlay Networks: Propose Modules";
Report for Research Report 38/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
B. Thallner, U. Schmid:
"Distributed Construction of Sparse Fault-Tolerant Overlay Networks";
Report for Research Report 35/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
B. Thallner, U. Schmid:
"Fault tolerant communication topologies for wireless ad hoc networks";
Report for Technical Report 183/1-132, Department of Automation, Technische Universität Wien;
2003.
P Tummeltshammer, M. Pueschel, A. Steininger, C. Überhuber:
"Constant Multiplication Methods";
Report for Research Report 107/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
P Tummeltshammer, M. Pueschel, A. Steininger, C. Überhuber:
"Face Recognition on ASICs";
Report for Research Report 108/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
I. van der Giessen, R. Jalali, R. Kuznets:
"Uniform interpolation via nested sequents and hypersequents";
Report for arXiv;
Report No. 2105.10930,
2021;
24 pages.
J. Vilanek:
"Zutrittskontrolle und Überwachung der Laborräume des Instituts für Technische Informatik";
Report for Technical Report 182-2, ECS, Technische Universität Wien, www.ecs.tuwien.ac.at;
2002.
J. Vilanek, U. Schmid, W. Kastner, B. Weiss, P. Puschner, W. Elmenreich, H. Deinhart, W. Meyer:
"Projektbericht Technische Informatik: Seamless Campus";
Report for Technical Report 183/1-135, Department of Automation, Technische Universität Wien;
2003.
B. Weiss, G. Gridling:
"Creating and Grading Multiple-Choice Exams";
Report for Research Report 63/2004, Technische Universität Wien, Institut für Technische Informatik, Treitlstraße 3, A-1040 Vienna, Austria;
2004.
J. Widder, G. Le Lann, U. Schmid:
"Perfect failure detection with booting in partially synchronous systems";
Report for Technical Report 183/1-131, Department of Automation, Technische Universität Wien;
2003.
J. Widder, U. Schmid:
"Booting clock synchronization in partially synchronous systems with hybrid node and link failures.";
Report for Technical Report 183/1-126, Department of Automation, Technische Universität Wien;
2003.
M. Zeiner, U. Schmid, U. Schilcher, C. Bettstetter:
"FWF-Proposal SPRG: Structural Properties of Random Graphs";
Report for Institut für Technische Informatik, TU Wien;
2016.
