Talks and Poster Presentations (with Proceedings-Entry):
A. Burg, D. Seethaler, G. Matz:
"VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding";
Talk: IEEE International Symposium on Circuits and Systems,
New Orleans (LA);
- 05-30-2007; in: "Proc. IEEE International Symposium on Circuits and Systems 2007",
This paper describes the first VLSI implementation of lattice reduction (LR) aided multi-antenna broadcast precoding with vector perturbation. The considered LR, scheme is based on Brun's algorithm for finding integer relations. We analyze its high-level architectural issues, we devise a corresponding low-complexity implementation, and, finally, we develop a suitable VLSI architecture. The resulting circuit provides reference for the true silicon complexity of LR, for broadcast precoding with vector perturbation.
"Official" electronic version of the publication (accessed through its Digital Object Identifier - DOI)
Electronic version of the publication:
Created from the Publication Database of the Vienna University of Technology.