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J. Vilanek, A. Steininger:
"FPGA Implementation of the Time-Triggered Protocol Controller TTPC-C Verification, Design-Experiences and Benefits";
Vortrag: World Multiconference on Systemics, cybernetics and Informatics, Orlando, Florida, USA; 14.07.2002 - 18.07.2002; in: "PROCEEDINGS", (2002), S. 407 - 412.

The Time-Triggered Protocol TTP/C is recently being considered for use in safety related applications in automotive, railway and avionics. From an economic as well as from a scientific point of view it is therefore interesting to investigate and optimize the properties of the protocol in general and the respective controller chip TTPC-C in particular. For several reasons, however, such studies often involve experiments with a physical prototype, which are hard to conduct with the ASIC implementation of the TTPC-C. An implementation based on programmable logic (FPGA) is extremely desirable for this purpose.
In this paper we present the basic structure of the TTPC-C and describe our experiences with retargeting the design to an FPGA platform. Special emphasis is put on verification and test issues, since these are key to a successful platform transformation. We give some examples of investigations that are enabled by the novel FPGA-based implementation.