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Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):

P. Puschner, R. Kirner:
"Avoiding Timing Problems in Real-Time Software";
Vortrag: IEEE Workshop on Software Technologies for Future Embedded Systems, Hakodate, Hokkaido, Japan; 15.05.2003 - 16.05.2003; in: "Proceedings of the IEEE Workshop on Software Technologies for Future Embedded Systems, 2003", (2003), S. 75 - 78.



Kurzfassung englisch:
To safely establish the correct timing of a real-time processing node, adequate architectural structures have to be used. This refers to the hardware architecture of the processing node as well as the software architecture of its operating system and application software. This paper presents architectures that allow for a well structured and simple timing analysis. First, it presents solutions for cleanly splitting the overall timing analysis into schedulability analysis and task worst-case execution time analysis. Second, it presents a programming strategy that yields software that is highly temporally predictable and easy to analyze for its worst-case execution time.


Online-Bibliotheks-Katalog der TU Wien:
http://aleph.ub.tuwien.ac.at/F?base=tuw01&func=find-c&ccl_term=AC04404386

Elektronische Version der Publikation:
http://www.vmars.tuwien.ac.at/php/pserver/extern/docdetail.php?DID=1149&viewmode=published&year=2003


Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.