Talks and Poster Presentations (with Proceedings-Entry):
P. Puschner, R. Kirner:
"Avoiding Timing Problems in Real-Time Software";
Talk: IEEE Workshop on Software Technologies for Future Embedded Systems,
Hakodate, Hokkaido, Japan;
2003-05-15
- 2003-05-16; in: "Proceedings of the IEEE Workshop on Software Technologies for Future Embedded Systems, 2003",
(2003),
75
- 78.
English abstract:
To safely establish the correct timing of a real-time processing node, adequate architectural structures have to be used. This refers to the hardware architecture of the processing node as well as the software architecture of its operating system and application software. This paper presents architectures that allow for a well structured and simple timing analysis. First, it presents solutions for cleanly splitting the overall timing analysis into schedulability analysis and task worst-case execution time analysis. Second, it presents a programming strategy that yields software that is highly temporally predictable and easy to analyze for its worst-case execution time.
Online library catalogue of the TU Vienna:
http://aleph.ub.tuwien.ac.at/F?base=tuw01&func=find-c&ccl_term=AC04404386
Electronic version of the publication:
http://www.vmars.tuwien.ac.at/php/pserver/extern/docdetail.php?DID=1149&viewmode=published&year=2003
Created from the Publication Database of the Vienna University of Technology.