Talks and Poster Presentations (with Proceedings-Entry):

B. Rahbaran, A. Steininger, T. Handl:
"Built-in Fault Injection in Hardware-- The FIDYCO Example";
Talk: IEEE International Workshop on Electronic Design, Test and Applications, Perth, Australia; 2004-01-28 - 2004-01-30; in: "Second IEEE International Workshop on Electronic Design, Test and Applications", B. Rahbaran, A. Steininger (ed.); IEEE Computer Society Press, Delta 2004, Perth Australia (2004), ISBN: 0-7695-2081-2; 327 - 332.

English abstract:
Experimental fault-injection plays a key role in the process of
fault tolerance validation. In this paper we discuss the
limitations of conventional experimental setups and investigate
how highly complex FPGAs can aid in overcoming these. Based on a
thorough analysis of the potential aims of fault-injection
experiments we derive a set of conditions for the design of an
FPGA-based fault-injection toolset.

We present the fault-injection tool FIDYCO as an example
implementation of this concept. Our FPGA-based toolset has three
main advantages: First, the availability of a physical target
system allows to perform experiments in real time. Second, the
programmable nature of the FPGA target platform facilitates
controllability and observability comparable to that of
simulation-based approaches. Third, the tight integration of fault
injector and device under test on the same hardware platform
allows for a higher precision of fault injection and diagnostic

Electronic version of the publication:

Created from the Publication Database of the Vienna University of Technology.