Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):
M. Schöberl:
"Design and Implementation of an Efficient Stack Machine";
Vortrag: International Parallel and Distributed Processing Symposium (IPDPS),
Denver, Colorado;
04.04.2005
- 08.04.2005; in: "Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International (IPDPS)",
(2005),
ISBN: 0-7695-2312-9;
S. 159.
Kurzfassung englisch:
Although virtually every processor today uses a loadstore register architecture, stack architectures attract attention again due to the success of Java. The intermediate language of Java, the Java bytecodes, is stack based and therefore a hardware realization of the Java Virtual Machine (JVM), a Java processor, is also stack based. In this paper two different architectures, found in Java processors, are presented. Detailed analysis of the JVM access patterns to the stack prove that a simpler and faster solution is possible. The proposed solution is a stack with two levels of on-chip cache.
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Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.