Diploma and Master Theses (authored and supervised):
"Principles of Timing Anomalies in Superscalar Processors";
Supervisor: P. Puschner, R. Kirner;
Institut für Technische Informatik,
Due to the temporal requirements resulting inherently from a real-time system in order to operate correctly, predictability regarding the behavior of a real-time computer system is a stringent imperative to be satisfied. Therefore, it is necessary to determine the timing behavior of programs running on real-time computer systems. Worst-case execution time (WCET) analysis is the research field investigating the timing behavior of real-time software. When analyzing the execution time of a real-time program, it is important to incorporate the timing behavior of the involved hardware in the analysis process. However, for modern processors containing superscalar pipelines, difficulties arise when trying to model these hardware features for WCET analysis. Timing anomalies are the unexpected behavior of certain features in superscalar processors that cause problems for existing WCET analysis methods. In this thesis, possible sources of timing anomalies in processor pipelines are identified. Comprehensive explanations with respect to the impact of timing anomalies on the WCET analysis are elaborated. Using a systematic approach, characteristic structural sources of superscalar pipelines potentially causing timing anomalies are analyzed. A general criterion (Resource Allocation Criterion) is presented that provides a necessary (but not sufficient) condition for the occurrence of timing anomalies of a processor. Some ideas and approaches found in literature for handling timing anomalies are presented, especially under consideration of the Resource Allocation Criterion.
Created from the Publication Database of the Vienna University of Technology.