Talks and Poster Presentations (with Proceedings-Entry):
T. Handl, A. Steininger:
"Implementation of an FPGA-Based Hardware Fault Injector";
Poster: Junior Scientist Conference,
- 2006-04-21; in: "Junior Scientist Conference 2006",
Fault injection (FI) plays a key role in the assessment of fault tolerance mechanisms of digital systems. It artificially increases the rate of fault occurrences, thus allowing a more comprehensive study of the fault effect which finally improves the quality of the results obtained. However, problems related to accessibility of internal nodes of a chip or SoC make it difficult to conduct such experiments. It is claimed that the most suitable location for placing an FI tool is directly on-chip. Other approaches (i.e. simulation) often tend to use levels of abstraction inadequate for dependability evaluation. This paper presents an FPGA-based hardware FI toolset we developed in order to address exactly this problem.
Online library catalogue of the TU Vienna:
Created from the Publication Database of the Vienna University of Technology.