[Back]


Talks and Poster Presentations (with Proceedings-Entry):

F. Seitner, R. Schreier, M. Bleyer, M. Gelautz:
"A Macroblock-level Analysis on the Dynamic Behaviour of an H.264 Decoder";
Talk: ISCE 2007, Dallas; 2007-06-20 - 2007-06-23; in: "Proceedings of ISCE 2007", IEEE, (2007), 1 - 5.



English abstract:
This work targets the optimization of multi-processor H.264 decoder implementations. We have extended the simulator of a multi-core VLIW media processor to enable cycle-accurate function profiling on a sub-macroblock level, which allows measuring the effects of coding modes on the computational complexity with very fine granularity. This knowledge helps the system designer to optimize the system performance and memory sizes to reduce system costs.

Keywords:
H.264 decoder, dynamic behaviour, multi-processor implementation


Electronic version of the publication:
http://publik.tuwien.ac.at/files/pub-inf_4967.pdf


Created from the Publication Database of the Vienna University of Technology.