Talks and Poster Presentations (with Proceedings-Entry):
M. Med, A. Krall:
"Instruction Set Encoding Optimization for Code Size Reduction";
Talk: IC-SAMOS - International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation,
Samos, Griechenland;
2007-07-16
- 2007-07-19; in: "Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation",
H. Blume, G. Gaydadjiev, J. Glossner, P. Knijnenburg (ed.);
IEEE,
(2007),
ISBN: 1-4244-1058-4;
9
- 17.
English abstract:
In an embedded system, the cost of storing a program on-chip can be as high as the cost of the microprocessor itself. We examine how much a given application's program size can be reduced when an instruction set is tailored to the application. We provide different algorithms for calculating an optimized instruction set and evaluate their impact on the size of several benchmark programs. Our results show that an average reduction of 11% is possible, and further improvement can be achieved by changing the instruction length of the given architecture. However compiling other applications with such an optimized instruction set might produce larger code sizes.
"Official" electronic version of the publication (accessed through its Digital Object Identifier - DOI)
http://dx.doi.org/10.1109/ICSAMOS.2007.4285728
Created from the Publication Database of the Vienna University of Technology.