Talks and Poster Presentations (with Proceedings-Entry):

C. Pitter:
"Time-predictable memory arbitration for a Java chip-multiprocessor";
Talk: Workshop on Java Technologies for Real-time and Embedded Systems (JTRES), Santa Clara, California; 2008-09-24 - 2008-09-26; in: "Proceedings of the 6th international workshop on Java technologies for real-time and embedded systems", ACM, (2008), ISBN: 978-1-60558-337-2; 115 - 122.

English abstract:
In this paper, we propose an approach to calculate worst-case execution times (WCET) of tasks running on a homogeneous Java multiprocessor. These processors access a shared main memory. Hence, the tasks running on different CPUs may influence the execution times of each other. Therefore, we implemented a time division multiple access arbiter that divides the memory access time into equal time slots, one time slot for each CPU. This memory arbitration allows calculating upper bounds for the execution time of Java bytecodes depending on the number of CPUs, the size of the time slot, and the memory access time. A WCET analysis tool can utilize these results and generate temporal, upper bounds for application tasks. We further explore how the size of the time slot and the number of CPUs in the system influence the WCET results. Furthermore, a real-world application task is used to compare the analyzed results with measured execution times. This paper describes the timing analysis of a time-predictable Java multiprocessor with shared memory.

"Official" electronic version of the publication (accessed through its Digital Object Identifier - DOI)

Created from the Publication Database of the Vienna University of Technology.