Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):
M. Schoeberl, P. Puschner, R. Kirner:
"A Single-Path Chip-Multiprocessor System";
Vortrag: Software Technologies for Embedded and Ubiquitous Systems 7th IFIP WG 10.2 International Workshop, SEUS 2009,
Newport Beach, CA, USA;
16.11.2009
- 18.11.2009; in: "Software Technologies for Embedded and Ubiquitous Systems 7th IFIP WG 10.2 International Workshop, SEUS 2009",
Lecture Notes in Computer Science / Springer Verlag,
5860
(2009),
ISBN: 978-3-642-10264-6;
S. 47
- 57.
Kurzfassung englisch:
In this paper we explore the combination of a time-predictable chip-multiprocessor system with the single-path programming paradigm. Time-sliced arbitration of the main memory access provides time-predictable memory load and store instructions. Single-path programming avoids control flow dependent timing variations. To keep the execution time of tasks constant, even in the case of shared memory access of several processor cores, the tasks on the cores are synchronized with the time-sliced memory arbitration unit.
"Offizielle" elektronische Version der Publikation (entsprechend ihrem Digital Object Identifier - DOI)
http://dx.doi.org/10.1007/978-3-642-10265-3_5
Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.