Talks and Poster Presentations (with Proceedings-Entry):

M.A. Ertl:
"Utilizing Multiple Hardware Threads with Pipeline Parallelism";
Talk: 15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS 2009), Maria Taferl; 2009-10-12 - 2009-10-14; in: "15. Kolloquium Programmiersprachen und Grundlagen der Programmierung (KPS '09)", Schriftenreihe des Instituts für Computersprachen, TU Wien, Bericht 2009-X-1 (2009), 69 - 75.

English abstract:
In recent years general-purpose CPUs have aquired
multiple hardware threads by providing multiple
cores per CPU (multi-core) and multiple hardware
threads per core (simultaneous
multi-threading). Making good use of such resources
has been a challenge for several decades that has
been successfully attacked for scientific
applications, but not to a significant extent for
general-purpose applications. The main current
paradigm for this programming problem is to have
explicit threads that share memory and are
synchronized by a variety of synchronzation
constructs. Unfortunately, it seems to be too hard
to program profitably in this paradigm for
general-purpose applications. Pipeline parallelism
is a programming paradigm that has proved so easy to
understand that shell programmers use it even on
machines that have only one hardware thread. In this
work we present the case for better support for
pipeline parallelism in programming languages, and
present ideas on how to improve the scalability of
the implementation of pipeline parallelism.

Created from the Publication Database of the Vienna University of Technology.