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F. Brandner, V. Pavlu, A. Krall:
"Modeling Application-Specific Processors for the Use in Cyber-Physical Systems";
Talk: 41. Jahrestagung der Gesellschaft für Informatik, Berlin, Deutschland; 2011-10-04 - 2011-10-07; in: "Informatik 2011", Gesellschaft für Informatik e.V. (GI), 192 (2011), ISBN: 978-3-88579-286-4.

Embedded systems often have to operate under rigid power and performance constraints. Off-the-shelf processors often cannot meet those requirements, instead Application-Specific Instruction Processors (ASIP) are used that are tuned for the particular system at hand.
A popular and powerful way of modeling ASIPs is the use of a Processor Description Language (PDL). These languages capture the internal hardware organization as well as the processor´s instruction set using a formal specification. Given a processor description, generator tools can (semi-)automatically derive software development tools, instruction set simulators, and even hardware reference models.
An integral part of the software, running on the ASIP, is the interaction with devices outside of the computing platform. However, these external devices are neglected by many PDLs. This is, in part, due to their diverse nature and complex behavior. Explicitly including such devices in processor models, is thus unlikely to give a practical solution.
We propose a basic set of communication patterns for the xADL processor exploration system that allow to interact with external devices, while otherwise treating them as black boxes. The xADL system allows to model three kinds of communication: (1) data exchange using dedicated instructions or memory mapped I/O, (2) asynchronous delivery of data directly into processor registers or memory, and (3) asynchronous signaling using interrupts. A major advantage of our approach is that all side-effects of these interactions are visible to the xADL tool suite. For example, our compiler generator accounts for side-effects during code generation, while the generated simulators reduce simulation time by refactoring the expensive emulation of interrupts.

processor description language; application-specific instruction processor; cyber-physical system;

http://publik.tuwien.ac.at/files/PubDat_203437.pdf

Project Head Andreas Krall:
Optimale Code Erzeugung für explizit parallele Prozessoren