Talks and Poster Presentations (without Proceedings-Entry):
"Efficient Instruction Set Simulation with Abstract State Machines";
Lyon, Frankreich (invited);
When developing application specific processors an efficient and
correct toolchain is mandatory. Abstract State Machines (ASMs) are a
well established method for the formal specification of programming
languages and systems. Unfortunately, the execution of ASM models is
quite slow. In this article we show how efficient instruction set
simulators based on ASMs can be constructed. From a processor
description written in an architecture description language we extract a
processor model expressed in an ASM language. This ASM model is
translated to C++ and together with a run time library forms the
instruction set simulator. This instruction set simulator performs
better than an interpretive instruction set simulator.
Created from the Publication Database of the Vienna University of Technology.