Talks and Poster Presentations (with Proceedings-Entry):
C. El Salloum, M. Elshuber, O. Höftberger, H. Isakovic, A. Wasicek:
"The ACROSS MPSoC - A New Generation of Multi-Core Processors designed for Safety-Critical Embedded Systems";
Talk: DSD 2012 (Euromicro Conference on Digital System Design),
Cesme, Izmir, Turkey (invited);
- 2012-09-08; in: "2012 15th Euromicro Conference on Digital System Design (DSD 2012), Proceedings",
IEEE Computer Society,
The European ARTEMIS ACROSS project aims to overcome the limitations of existing Multi-Processor Systems- on-a-Chip (MPSoC) architectures with respect to safety-critical applications. MPSoCs have a tremendous potential in the domain of embedded systems considering their enormous computational capacity and energy efficiency. However, the currently existing MPSoC architectures have significant limitations with respect to safety-critical applications. These limitations include difficulties in the certification process due to the high complexity of MPSoCs, the lacking temporal determinism and problems related to error propagation between subsystems. These limitations become even more severe, when subsystems of different criticality levels have to be integrated on the same computational platform. Examples of such mixed-criticality integration are found in the avionics and automotive industry with their desire to integrate safety-critical, mission critical and non-critical subsystems on the same platform in order to minimize size, weight, power and cost. The main objective of ACROSS is to develop a new generation of multi- core processors designed specially for safety-critical embedded systems; the ACROSS MPSoC. In this paper we will show how the ACROSS MPSoC overcomes the limitations of existing MPSoC architectures in order to make the multi-core technology available to the safety-critical domain.
"Official" electronic version of the publication (accessed through its Digital Object Identifier - DOI)
Electronic version of the publication:
Created from the Publication Database of the Vienna University of Technology.