Talks and Poster Presentations (with Proceedings-Entry):
J. Reitterer, F. Fidler, F.S. Julien-Wallsee, M. Barth, W. Eberhardt, U Keßler, H. Kück, U. Schmid:
"Analysis of thermal vias in molded interconnect devices";
Talk: SPIE Microtechnologies 2013,
Grenoble, France;
04-24-2013
- 04-26-2013; in: "Proceedings of SPIE Vol. 8763",
8763
(2013),
ISSN: 0277-786x.
English abstract:
The ongoing miniaturization of micro-opto-electro-mechanical-systems requires compact multifunctional packaging
solutions like o ered by the three-dimensional MID (molded interconnect device) technology which combines
integrated electronic circuitry and mechanical support structures directly into one compact housing. Due to the
inherently large thermal resistance of thermoplastic MID substrate materials, temperature-sensitive applications
require carefully arranged thermal vias in order to reduce the thermal resistance of the packaging e ectively.
This paper presents the analysis and optimization of various laser-drilled thermal via design parameters of MIDs
including hole diameter, pitch, plating thickness of the Cu/Ni/Au metallization layers as well as the void level
of the lling material inside the vias.
Keywords:
Molded interconnect device, LPKF-LDSR process, thermal via, thermal resistance, conductive adhesive, MEMS, MOEMS
"Official" electronic version of the publication (accessed through its Digital Object Identifier - DOI)
http://dx.doi.org/10.1117/12.2017361
Created from the Publication Database of the Vienna University of Technology.