Publications in Scientific Journals:
V. S. Veeravalli, T. Polzer, U. Schmid, A. Steininger, M. Hofbauer, K. Schweiger, H. Dietrich, K. Schneider-Hornstein, H. Zimmermann, K. Voss, B. Merk, M. Hajek:
"An infrastructure for accurate characterization of single-event transients in digital circuits";
Microprocessors and Microsystems,
We present the architecture and a detailed pre-fabrication analysis of a digital measurement ASIC facilitating
long-term irradiation experiments of basic asynchronous circuits, which also demonstrates the
suitability of the general approach for obtaining accurate radiation failure models developed in our FATAL
project. Our ASIC design combines radiation targets like Muller C-elements and elastic pipelines as well
as standard combinational gates and flip-flops with an elaborate on-chip measurement infrastructure.
Major architectural challenges result from the fact that the latter must operate reliably under the same
radiation conditions the target circuits are exposed to, without wasting precious die area for a rad-hard
design. A measurement architecture based on multiple non-rad-hard counters is used, which we show to
be resilient against double faults, as well as many triple and even higher-multiplicity faults. The design
evaluation is done by means of comprehensive fault injection experiments, which are based on detailed
Spice models of the target circuits in conjunction with a standard double-exponential current injection
model for single-event transients (SET). To be as accurate as possible, the parameters of this current
model have been aligned with results obtained from 3D device simulation models, which have in turn
been validated and calibrated using micro-beam radiation experiments at the GSI in Darmstadt, Germany.
For the latter, target circuits instrumented with high-speed sense amplifiers have been used for
analog SET recording. Together with a probabilistic analysis of the sustainable particle flow rates, based
on a detailed area analysis and experimental cross-section data, we can conclude that the proposed architecture
will indeed sustain significant target hit rates, without exceeding the resilience bound of the measurement
Asynchronous digital design Radiation fault-tolerance Single-event transients Single-event upsets LFSR counters Elastic pipelines Muller C-elements TCAD models Spice models SET injection experiments Ion beam radiation
Created from the Publication Database of the Vienna University of Technology.