Talks and Poster Presentations (with Proceedings-Entry):

V. S. Veeravalli, A. Steininger:
"Architecture for Monitoring SET Propagation in 16-bit Sklansky Adder";
Poster: 15th International Symposium & Exhibit on Quality Electronic Design, Santa Clara, USA; 2014-03-10 - 2014-03-12; in: "Proceedings 15th International Symposium & Exhibit on Quality Electronic Design", (2014), ISBN: 978-1-4799-3946-6; 8 pages.

English abstract:
We propose a measurement architecture that allows to trace generation and propagation of singleevent transients in a combinational target circuit that will be subjected to radiation in an experimental study. We choose the Sklansky adder as a target circuit, since it exhibits
both properties we are interested in, namely different amounts of fanout and a carry propagation chain. The problem of devising a suitable on-chip measurement infrastructure lies in the partly contradictory requirements, like constrained area, radiation tolerance and good resolution of the location and propagation path of particle hits. Our proposed architecture is based on linear feedback shift registers that can be used as lean and robust counter implementations. These counters are attached at selected locations
within the target adder circuit, and we show by means of a simulation study as well as a fault dictionary that this architecture indeed comes up to our expectations.

"Official" electronic version of the publication (accessed through its Digital Object Identifier - DOI)

Created from the Publication Database of the Vienna University of Technology.