Talks and Poster Presentations (with Proceedings-Entry):
"Embedded Systems for Safety-Critical and Mixed-Criticality Applications";
Keynote Lecture: Second Mediterranean Conference on Embedded Computing,
Budva, Montenegro (invited);
- 2013-06-20; in: "Proceedings 2nd Mediterranean Conference on Embedded Computing (MECO)",
Multi-core processors promise a number of benefits for dependable embedded systems. They offer higher performance than single-core processors and consume less energy than high-speed single cores of equivalent computational power, thus reducing the number of computational nodes and wiring in a system and increasing robustness. Further, the cores of heterogeneous multi-cores can be tailored to match the specific functionalities of the embedded computer system. Despite these promises, multi-cores are not automatically well-suited for safety-critical and mixed-criticality embedded systems - if not carefully designed, the lack of spatial and temporal partitioning and the barely analyzable worst- case timing behavior of performance-enhancing features render the validation of claims about the dependability and correct timing of applications on today's powerful multi-cores impossible.
This tutorial therefore presents the key architectural principles that must be followed when constructing embedded multi-core systems for safety-critical and mixed-criticality applications. Further we will introduce a design methodology for the implementation of applications on top of multi-core systems that follow these principles.
Created from the Publication Database of the Vienna University of Technology.