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Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):

I. Ayestaran, Carlos Nicolas, J. Perez, A. Ortube, P. Puschner:
"A Simulated Fault Injection Framework for Time-Triggered Safety-Critical Embedded Systems";
Vortrag: International Conference on Computer Safety, Reliability and Security (SAFECOMP), Florence, Italy; 10.09.2014 - 12.09.2014; in: "Computer Safety, Reliability and Security", Lecture Notes in Computer Science / Springer, Volume 8666 (2014), ISBN: 978-3-319-10506-2; S. 1 - 16.



Kurzfassung englisch:
This paper presents a testing and simulated fault injection framework for time-triggered safety-critical embedded systems. Our ap- proach facilitates the validation of fault-tolerance mechanisms by per- forming non-intrusive Simulated Fault Injection (SFI) on models of the system at different stages of the development, from the Platform Inde- pendent Model (PIM) to the Platform Specific Model (PSM). The SFI enables exercising the intended fault tolerance mechanisms by injecting faults in a simulated model of a system. The main benefit of this work is that it enables an early detection of design flaws in fault-tolerant sys- tems, what reduces the possibility of late discovery of design pitfalls that might require an expensive redesign of the system. We examine the fea- sibility of the proposed approach in a case study, where SFI is used to assess the fault tolerance mechanisms designed in a simplified railway signaling system.

Schlagworte:
Simulated Fault Injection, Automatic Test Executor, Time- Triggered Systems, Dependable Systems, Safety-Critical Systems, Fault Tolerance

Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.