Talks and Poster Presentations (with Proceedings-Entry):

V. S. Veeravalli, A. Steininger:
"Long Term On-Chip Monitoring of SET Pulsewidths in a Fully Digital ASIC";
Talk: 22nd Austrian Workshop on Microelectronics, Graz; 2014-10-09; in: "Proceedings of the 22nd Austrian Workshop on Micorelectronics", IEEE, (2014), ISBN: 978-1-4799-7243-2; Paper ID 24, 6 pages.

English abstract:
We present the design of an all-digital
measurement circuit for the pulsewidth of single-event transients
(SETs). It is used as an on-chip infrastructure block on a target
chip that will be subjected to radiation in an experimental study.
Therefore it needs to be area-efficient, robust and fast at the
same time. A special feature of our proposed design is to allow
recording a vector of SET pulse widths, thus avoiding the need
for frequent read-out during the ongoing experiment. We prove
the proper operation of our circuit by means of SET injection in
a pre-layout simulation for a 90nm UMC bulk CMOS

Single-event transient; on-chip infrastructure, pulse width measurement

"Official" electronic version of the publication (accessed through its Digital Object Identifier - DOI)

Related Projects:
Project Head Andreas Steininger:
Analysis & Modeling of Single-Event-Transients in VLSI Chips

Created from the Publication Database of the Vienna University of Technology.