Talks and Poster Presentations (with Proceedings-Entry):

S. Kandl:
"How Mutations Can Help to Prove That Your System Does Not Contain (Unwanted) Mutations";
Talk: Design, Automation and Test in Europe Conference (DATE), Grenoble, France (invited); 2015-03-09 - 2015-03-13; in: "DATE 2015 - M04 Embedded Systems: Functional Qualification: Applications in the C/C++ Domain", (2015).

English abstract:
This presentation gives an overview on mutation-based techniques for verification purposes.
A mutation is a modification of a component of the verification environment.
Whereas the main aim of verification is to detect unwanted mutations in the system (colloquial: bugs), intended and reproducible mutations can help to assess, reveal weaknesses, and, by this, improve the verification environment.
Mutations may be applied to the system itself (e.g., software), to system properties, to test cases, or to other verification components.
Besides explaining the basic principles, we will address the powerfulness and possible restrictions of the proposed mutation-based techniques for verification.

Testing, Mutation-Based Testing, Verification

Created from the Publication Database of the Vienna University of Technology.