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Talks and Poster Presentations (with Proceedings-Entry):

X. Zhang, M. Ebrahimi, L. Huang, G. Li, A. Jantsch:
"A Routing-Level Solution for Fault Detection, Masking, and Tolerance in NoCs";
Talk: IEEE Euromicro Conference on Parallel, Distributed and Network-Based Computing, (PDP), Turku; 2015-03-04 - 2015-03-06; in: "Proceedings of 23rd IEEE Euromicro Conference on Parallel, Distributed and Network-Based Computing, (PDP)", (2015), ISBN: 978-1-4799-8491-6; Paper ID 365-369, 5 pages.



English abstract:
Faults may occur in numerous locations of a router in a NoC platform. Compared with the faults in the data path, faults in the control path may cause more severe effects which may result in crashing the entire system. Most of the current efforts in literature focus on disabling a router when a fault is detected. Considering this level of coarse-granularity, the functioning parts of a router have to be unnecessarily disabled which may severely affect the performance or functionality of the on-chip network. To cope with this problem, in this paper we propose a mechanism to tolerate faults in the control path which largely avoid disabling a router as long as the fault is not severe. This mechanism is called DMT, standing for three distinguishing characteristics of the proposed method as fault Detection, fault Masking and fault Tolerance. The proposed mechanism can efficiently detect the faults expressed as illegal turns while it has the capability to tolerate faults without a prior knowledge on where and why a fault has happened.

Keywords:
Network-On-Chip; fault-tolerance


"Official" electronic version of the publication (accessed through its Digital Object Identifier - DOI)
http://dx.doi.org/10.1109/PDP.2015.87


Created from the Publication Database of the Vienna University of Technology.