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Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):

N. TaheriNejad, S. Pudukotai Dinakarrao, A. Jantsch:
"Memristors' Potential for Multi-Bit Storage and Pattern Learning";
Vortrag: IEEE Proceeding of the 9th European Modelling Symposium (EMS 2015), Madrid, Spain; 06.10.2015 - 08.10.2015; in: "IEEE Proceedings of the 9th European Modelling Symposium (EMS 2015)", Madrid, Spain (2015), ISBN: 978-1-5090-0206-1; 6 S.



Kurzfassung englisch:
Memristor is a two-terminal device, termed as fourth element, and characterized by a varying resistance depending on the charge (current) flown through it. This leads to many interesting characteristics, including a memory of its past states, demonstrated in its resistance. Smaller area and power consumed by memristors compared to conventional memories makes them a more suitable choice for applications needing large memory. In this paper we explore one of the unique properties of memristors which extends their suitability by allowing storage of multi-bit data in a single memristor. Their ability of storing multi-bit patterns will be shown via a simplified proof and simulations. This characteristic can be advantageous for many applications. In this paper particularly, we briefly discuss its advantages in pattern learning applications.

Schlagworte:
memristors;pattern recognition;random-access storage;memristors;multibit data storage;pattern learning;two-terminal device;Batteries;Encoding;Memory management;Memristors;Pattern recognition;Resistance;Switches;Digital Coding Systems;Memristors;Multi-bit


"Offizielle" elektronische Version der Publikation (entsprechend ihrem Digital Object Identifier - DOI)
http://dx.doi.org/10.1109/EMS.2015.73

Elektronische Version der Publikation:
http://publik.tuwien.ac.at/files/publik_244029.pdf


Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.