Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):
K. Selyunin, T. Nguyen, A.D. Basa, E. Bartocci, D. Nickovic, R. Grosu:
"Applying High-Level Synthesis for Synthesizing Hardware Runtime STL Monitors of Mission-Critical Properties";
Vortrag: Design and Verification Conference and Exhibition,
San Jose, USA;
29.02.2016
- 03.03.2016; in: "Design and Verification Conference and Exhibition",
Online,
(2016),
8 S.
Kurzfassung englisch:
Runtime monitoring is an important technique for catching failures. This work shows how to synthesize hardware
runtime monitors using High-Level Synthesis to check system requirements that are formalized and expressed in Signal
Temporal Logic. We describe our flow starting from a natural language requirement to hardware implementation. As a case
study, we apply our flow to monitor a mission-critical property of a missile launch.
Elektronische Version der Publikation:
http://events.dvcon.org/2016/proceedings/papers/02_3.pdf
Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.