Talks and Poster Presentations (without Proceedings-Entry):
"Digital Modeling of Asynchronous Integrated Circuits";
Talk: 2nd Workshop on Hardware Design and Theory (https://sites.google.com/view/motimedina/hdt-2019, colocated with DISC 2019),
We present some of the results and open challenges in the development of a purely digital model for asynchronous circuits, which shall enables accurate and fast dynamic timing analysis and formal verification of such designs. In our research, we primarily consider advanced delay models, where the input-to-output delays depend on previous inputs also. Such models shall not only be accurate, but also realistic (we coined the term faithful for their conjunction), in the sense that the behavior of circuits described in the model is exactly, i.e., within the modeling accuracy, the same as the behavior of the corresponding real circuit. We proved that all the existing standard delay models, including pure and inertial delays, are not faithful, and proposed the involution delay model as the only faithful alternative known so far. In this talk, we will present an overview of our results and report on some of the problems we are currently working on in this area.
Digital integrated circuits, modeling and analysis, delay models
Electronic version of the publication:
Created from the Publication Database of the Vienna University of Technology.