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Talks and Poster Presentations (with Proceedings-Entry):

J. Prasek, D. Houska, R. Hrdy, J. Hubalek, U. Schmid:
"Optimization of Deep Reactive Ion Etching Process for on Chip Energy Storage";
Talk: 42nd International Spring Seminar on Electronics Technology - ISSE2019, Wroclaw, Polen; 05-15-2019 - 05-19-2019; in: "42nd International Spring Seminar on Electronics Technology", (2019), ISBN: 978-83-7493-070-3; 175 - 176.



English abstract:
In this paper we optimize cryogenic and Bosch Deep Reactive Ion Etching
(DRIE) processes to achieve the best aspect ratios of trenches that will be used for fabrication of
energy storage on a chip. The smoothness and purity of the trenches´ walls/bottoms are other
parameters we investigate and optimize. Using cryogenic process, we have obtained aspect ratio
of 26:1 with smooth and uniform surface, but aspect ratio of 40:1 is expected to be achieved using
other optimizations. The dependence of process parameters on the trenches´ quality will be
investigated and presented in the full paper.

Created from the Publication Database of the Vienna University of Technology.