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Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):

J. Maier, D. Öhlinger, U. Schmid, M Függer, T. Nowak:
"A Composable Glitch-Aware Delay Model";
Vortrag: Great Lakes Symposium on VLSI GLSVLSI'21, virtuell; 22.06.2021 - 25.06.2021; in: "Proceedings of the 2021 Great Lakes Symposium on VLSI", ACM (Hrg.); (2021), ISBN: 978-1-4503-8393-6; S. 147 - 154.



Kurzfassung englisch:
We introduce the Composable Involution Delay Model (CIDM) for
fast and accurate digital simulation. It is based on the Involution
Delay Model (IDM) [Függer et al., IEEE TCAD 2020], which has
been shown to be the only existing candidate model for faithful
glitch propagation. The IDM, however, has shortcomings that limit
its applicability. Our CIDM thus reduces the characterization effort
by allowing independent discretization thresholds, improves com-
posability and increases the modeling power by exposing canceled
pulse trains at the gate interconnect. We formally show that, despite
these improvements, the CIDM still retains the IDM´s faithfulness.

Schlagworte:
digital timing simulation; composable delay estimation model; faith- ful glitch propagation; pulse degradation


"Offizielle" elektronische Version der Publikation (entsprechend ihrem Digital Object Identifier - DOI)
http://dx.doi.org/10.1145/3453688.3461519

Elektronische Version der Publikation:
https://publik.tuwien.ac.at/files/publik_296556.pdf


Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.