Vorträge und Posterpräsentationen (mit Tagungsband-Eintrag):
F. Seitner, J. Meser, G. Schedelberger, A. Wasserbauer, M. Bleyer, M. Gelautz, M. Schutti, R. Schreier, P. Vaclavik, K. Krottendorfer, G. Truhlar, T. Bauernfeind, P. Beham:
"Design Methodology for the SVENm Multimedia Engine";
Poster: 16th Austrian Workshop on Microelectronics (Austrochip),
Linz (eingeladen);
08.10.2008; in: "Proc. of the 16th Austrian Workshop on Microelectronics",
(2008).
Kurzfassung englisch:
The high computational demands of modern multimedia applications such as the H.264 video coding standard pose serious challenges on current hardware architectures. A natural way to tackle this problem is the use of multi-core systems. In this work, we introduce a high-level simulator, the Partition Assessment Tool. This tool supports the development of efficient and application-optimized multi-core video coding systems.
An application of the Partition Assessment Tool is demonstrated. We introduce a new multi-processor multimedia chip called SVENm. This programmable architecture targets multimedia applications with a special focus on video encoding and decoding. A description of SVENm´s architecture is provided. We give insights on how the Partition Assessment Tool is used to find an optimized multi-core partitioning of an H.264 video decoder on the SVENm architecture. This partitioning is optimized in terms of computational complexity, software parallelization and displaying.
Schlagworte:
Multimedia, Processor, H.264, Video, Decoding, SoC, Multi-Core
Elektronische Version der Publikation:
http://publik.tuwien.ac.at/files/PubDat_167386.pdf
Erstellt aus der Publikationsdatenbank der Technischen Universität Wien.